• James Hogan's avatar
    KVM: MIPS/Emulate: Properly implement TLBR for T&E · dc44abd6
    James Hogan authored
    Properly implement emulation of the TLBR instruction for Trap & Emulate.
    This instruction reads the TLB entry pointed at by the CP0_Index
    register into the other TLB registers, which may have the side effect of
    changing the current ASID. Therefore abstract the CP0_EntryHi and ASID
    changing code into a common function in the process.
    
    A comment indicated that Linux doesn't use TLBR, which is true during
    normal use, however dumping of the TLB does use it (for example with the
    relatively recent 'x' magic sysrq key), as does a wired TLB entries test
    case in my KVM tests.
    Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
    Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
    Cc: Paolo Bonzini <pbonzini@redhat.com>
    Cc: "Radim Krčmář" <rkrcmar@redhat.com>
    Cc: linux-mips@linux-mips.org
    Cc: kvm@vger.kernel.org
    dc44abd6
emulate.c 75.2 KB