• Archit Taneja's avatar
    drm/msm/mdp5: Assign a 'right hwpipe' to plane state · 7a10ee9b
    Archit Taneja authored
    If the drm_plane has a source width that's greater than the max width
    supported by a SSPP (2560 pixels on 8x96), then we assign a 'r_hwpipe'
    to it in mdp5_plane_atomic_check().
    
    TODO: There are a few scenarios where the hwpipe assignments aren't
    recommended by HW. For example, an assignment which results in a
    drm_plane to of two different types of hwpipes (say RGB0 on left
    and DMA1 on right) is not recommended.
    Also, hwpipes have a priority mapping, where the higher priority pipe
    needs to be staged on left LM, and the lower priority needs to be
    staged on the right LM. For example, the priority order for VIG pipes
    in decreasing order of priority is VIG0, VIG1, VIG2, and VIG3. So, VIG0
    on left and VIG1 on right is a correct configuration, but VIG1 on left
    and VIG0 on right isn't. These scenarios are ignored for now for the
    sake of simplicity.
    Signed-off-by: default avatarArchit Taneja <architt@codeaurora.org>
    Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
    7a10ee9b
mdp5_kms.h 8.62 KB