• David Carrillo-Cisneros's avatar
    perf/x86/intel: Fix MSR_LAST_BRANCH_FROM_x bug when no TSX · 19fc9ddd
    David Carrillo-Cisneros authored
    Intel's SDM states that bits 61:62 in MSR_LAST_BRANCH_FROM_x are the
    TSX flags for formats with LBR_TSX flags (i.e. LBR_FORMAT_EIP_EFLAGS2).
    
    However, when the CPU has TSX support deactivated, bits 61:62 actually
    behave as follows:
    
      - For wrmsr(), bits 61:62 are considered part of the sign extension.
      - When capturing branches, the LBR hw will always clear bits 61:62.
        regardless of the sign extension.
    
    Therefore, if:
    
      1) LBR has TSX format.
      2) CPU has no TSX support enabled.
    
    ... then any value passed to wrmsr() must be sign extended to 63 bits
    and any value from rdmsr() must be converted to have a sign extension
    of 61 bits, ignoring the values at TSX flags.
    
    This bug was masked by the work-around to the Intel's CPU bug:
    BJ94. "LBR May Contain Incorrect Information When Using FREEZE_LBRS_ON_PMI"
    in Document Number: 324643-037US.
    
    The aforementioned work-around uses hw flags to filter out all kernel
    branches, limiting LBR callstack to user level execution only.
    
    Since user addresses are not sign extended, they do not trigger the wrmsr()
    bug in MSR_LAST_BRANCH_FROM_x when saved/restored at context switch.
    
    To verify the hw bug:
    
      $ perf record -b -e cycles sleep 1
      $ rdmsr -p 0 0x680
      0x1fffffffb0b9b0cc
      $ wrmsr -p 0 0x680 0x1fffffffb0b9b0cc
      write(): Input/output error
    
    The quirk for LBR_FROM_ MSRs is required before calls to wrmsrl() and
    after rdmsrl().
    
    This patch introduces it for wrmsrl()'s done for testing LBR support.
    
    Future patch in series adds the quirk for context switch, that would
    be required if LBR callstack is to be enabled for ring 0.
    Signed-off-by: default avatarDavid Carrillo-Cisneros <davidcc@google.com>
    Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
    Reviewed-by: default avatarStephane Eranian <eranian@google.com>
    Reviewed-by: default avatarAndi Kleen <ak@linux.intel.com>
    Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
    Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
    Cc: Jiri Olsa <jolsa@redhat.com>
    Cc: Kan Liang <kan.liang@intel.com>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: Vince Weaver <vincent.weaver@maine.edu>
    Link: http://lkml.kernel.org/r/1466533874-52003-3-git-send-email-davidcc@google.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
    19fc9ddd
perf_event.h 26 KB