• Paul Burton's avatar
    MIPS: CPS: use 32b accesses to GCRs · 90996511
    Paul Burton authored
    Commit b677bc03 ("MIPS: cps-vec: Use macros for various arithmetics
    and memory operations") replaced various load & store instructions
    through cps-vec.S with the PTR_L & PTR_S macros. However it was somewhat
    overzealous in doing so for CM GCR accesses, since the bit width of the
    CM doesn't necessarily match that of the CPU. The registers accessed
    (GCR_CL_COHERENCE & GCR_CL_ID) should be safe to simply always access
    using 32b instructions, so do so in order to avoid issues when using a
    32b CM with a 64b CPU.
    Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
    Cc: Markos Chandras <markos.chandras@imgtec.com>
    Cc: <stable@vger.kernel.org> # 3.16+
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: James Hogan <james.hogan@imgtec.com>
    Patchwork: https://patchwork.linux-mips.org/patch/10864/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    90996511
cps-vec.S 9.24 KB