• Changbin Du's avatar
    drm/i915/gvt: exclude cfg space from failsafe mode · f8572690
    Changbin Du authored
    When test GVTg as below scenario:
      VM boot --> failsafe --> kill qemu --> VM boot.
    Qemu report error at the second boot:
      ERROR: PCI region size must be pow2 type=0x0, size=0x1fa1000
    
    Qemu need access PCI_ROM_ADDRESS reg to determine the size of expansion
    PCI rom. The mechanism just like the BAR reg (write-read) and we should
    return the size 0 since we have no rom. If we reject the write to
    PCI_ROM_ADDRESS, Qemu cannot get the correct size of rom.
    
    Essentially, GVTg failsafe mode should not break PCI function. So we
    exclude cfg space from failsafe mode. This can fix above issue.
    
    v2: add Fixes and Bugzilla link.
    
    Fixes: fd64be63 ("drm/i915/gvt: introduced failsafe mode into vgpu")
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100296Signed-off-by: default avatarChangbin Du <changbin.du@intel.com>
    Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
    f8572690
cfg_space.c 10.8 KB