• Oscar Mateo's avatar
    drm/i915/icl: Deal with GT INT DW correctly · 96606f3b
    Oscar Mateo authored
    BSpec says:
    
    "Second level interrupt events are stored in the GT INT DW. GT INT DW is
    a double buffered structure. A snapshot of events is taken when SW reads
    GT INT DW. From the time of read to the time of SW completely clearing
    GT INT DW (to indicate end of service), all incoming interrupts are logged
    in a secondary storage structure. this guarantees that the record of
    interrupts SW is servicing will not change while under service".
    
    We read GT INT DW in several places now:
    
    - The IRQ handler (banks 0 and 1) where, hopefully, it is completely
      cleared (operation now covered with the irq lock).
    - The 'reset' interrupts functions for RPS and GuC logs, where we clear
      the bit we are interested in and leave the others for the normal
      interrupt handler.
    - The 'enable' interrupts functions for RPS and GuC logs, as a measure
      of precaution. Here we could relax a bit and don't check GT INT DW
      at all or, if we do, at least we should clear the offending bit
      (which is what this patch does).
    
    Note that, if every bit is cleared on reading GT INT DW, the register
    won't be locked. Also note that, according to the BSpec, GT INT DW
    cannot be cleared without first servicing the Selector & Shared IIR
    registers.
    
    v2:
      - Remove some code duplication (Tvrtko)
      - Make sure GT_INTR_DW are protected by the irq spinlock, since it's a
        global resource (Tvrtko)
    
    v3: Optimize the spinlock (Tvrtko)
    
    v4: Rebase.
    v5:
      - take spinlock on outer scope to please sparse (Mika)
      - use raw_reg accessors (Mika)
    v6: omit the continue in looping banks (Michel)
    
    Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
    Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
    Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
    Signed-off-by: default avatarOscar Mateo <oscar.mateo@intel.com>
    Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (v4)
    Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
    Reviewed-by: default avatarMichel Thierry <michel.thierry@intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20180406093237.14548-1-mika.kuoppala@linux.intel.com
    96606f3b
i915_irq.c 125 KB