• Paulo Zanoni's avatar
    drm/i915: add some barriers when changing DIPs · 9d9740f0
    Paulo Zanoni authored
    On IVB and older, we basically have two registers: the control and the
    data register. We write a few consecutitve times to the control
    register, and we need these writes to arrive exactly in the specified
    order.
    
    Also, when we're changing the data register, we need to guarantee that
    anything written to the control register already arrived (since
    changing the control register can change where the data register
    points to). Also, we need to make sure all the writes to the data
    register happen exactly in the specified order, and we also *can't*
    read the data register during this process, since reading and/or
    writing it will change the place it points to.
    
    So invoke the "better safe than sorry" rule and just be careful and
    put barriers everywhere :)
    
    On HSW we still have a control register that we write many times, but
    we have many data registers.
    Demanded-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
    Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    9d9740f0
intel_hdmi.c 26.3 KB