• Ville Syrjälä's avatar
    x86/gpu: Add Intel graphics stolen memory quirk for gen2 platforms · a4dff769
    Ville Syrjälä authored
    There isn't an explicit stolen memory base register on gen2.
    Some old comment in the i915 code suggests we should get it via
    max_low_pfn_mapped, but that's clearly a bad idea on my MGM.
    
    The e820 map in said machine looks like this:
    
    	BIOS-e820: [mem 0x0000000000000000-0x000000000009f7ff] usable
    	BIOS-e820: [mem 0x000000000009f800-0x000000000009ffff] reserved
    	BIOS-e820: [mem 0x00000000000ce000-0x00000000000cffff] reserved
    	BIOS-e820: [mem 0x00000000000dc000-0x00000000000fffff] reserved
    	BIOS-e820: [mem 0x0000000000100000-0x000000001f6effff] usable
    	BIOS-e820: [mem 0x000000001f6f0000-0x000000001f6f7fff] ACPI data
    	BIOS-e820: [mem 0x000000001f6f8000-0x000000001f6fffff] ACPI NVS
    	BIOS-e820: [mem 0x000000001f700000-0x000000001fffffff] reserved
    	BIOS-e820: [mem 0x00000000fec10000-0x00000000fec1ffff] reserved
    	BIOS-e820: [mem 0x00000000ffb00000-0x00000000ffbfffff] reserved
    	BIOS-e820: [mem 0x00000000fff00000-0x00000000ffffffff] reserved
    
    That makes max_low_pfn_mapped = 1f6f0000, so assuming our stolen
    memory would start there would place it on top of some ACPI
    memory regions. So not a good idea as already stated.
    
    The 9MB region after the ACPI regions at 0x1f700000 however
    looks promising given that the macine reports the stolen memory
    size to be 8MB. Looking at the PGTBL_CTL register, the GTT
    entries are at offset 0x1fee00000, and given that the GTT
    entries occupy 128KB, it looks like the stolen memory could
    start at 0x1f700000 and the GTT entries would occupy the last
    128KB of the stolen memory.
    
    After some more digging through chipset documentation, I've
    determined the BIOS first allocates space for something called
    TSEG (something to do with SMM) from the top of memory, and then
    it allocates the graphics stolen memory below that. Accordind to
    the chipset documentation TSEG has a fixed size of 1MB on 855.
    So that explains the top 1MB in the e820 region. And it also
    confirms that the GTT entries are in fact at the end of the the
    stolen memory region.
    
    Derive the stolen memory base address on gen2 the same as the
    BIOS does (TOM-TSEG_SIZE-stolen_size). There are a few
    differences between the registers on various gen2 chipsets, so a
    few different codepaths are required.
    
    865G is again bit more special since it seems to support enough
    memory to hit 4GB address space issues. This means the PCI
    allocations will also affect the location of the stolen memory.
    Fortunately there appears to be the TOUD register which may give
    us the correct answer directly. But the chipset docs are a bit
    unclear, so I'm not 100% sure that the graphics stolen memory is
    always the last thing the BIOS steals. Someone would need to
    verify it on a real system.
    
    I tested this on the my 830 and 855 machines, and so far
    everything looks peachy.
    Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Cc: Bjorn Helgaas <bhelgaas@google.com>
    Link: http://lkml.kernel.org/r/1391628540-23072-3-git-send-email-ville.syrjala@linux.intel.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
    a4dff769
early-quirks.c 16.1 KB