• Daniel Vetter's avatar
    drm/i915: Implement workaround for broken CS tlb on i830/845 · b45305fc
    Daniel Vetter authored
    Now that Chris Wilson demonstrated that the key for stability on early
    gen 2 is to simple _never_ exchange the physical backing storage of
    batch buffers I've tried a stab at a kernel solution. Doesn't look too
    nefarious imho, now that I don't try to be too clever for my own good
    any more.
    
    v2: After discussing the various techniques, we've decided to always blit
    batches on the suspect devices, but allow userspace to opt out of the
    kernel workaround assume full responsibility for providing coherent
    batches. The principal reason is that avoiding the blit does improve
    performance in a few key microbenchmarks and also in cairo-trace
    replays.
    Signed-Off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
    [danvet:
    - Drop the hunk which uses HAS_BROKEN_CS_TLB to implement the ring
      wrap w/a. Suggested by Chris Wilson.
    - Also add the ACTHD check from Chris Wilson for the error state
      dumping, so that we still catch batches when userspace opts out of
      the w/a.]
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    b45305fc
intel_ringbuffer.c 47.1 KB