• Jacek Tomaka's avatar
    perf/x86/intel: Add support/quirk for the MISPREDICT bit on Knights Landing CPUs · 16160c19
    Jacek Tomaka authored
    Problem: perf did not show branch predicted/mispredicted bit in brstack.
    
    Output of perf -F brstack for profile collected
    
    Before:
    
     0x4fdbcd/0x4fdc03/-/-/-/0
     0x45f4c1/0x4fdba0/-/-/-/0
     0x45f544/0x45f4bb/-/-/-/0
     0x45f555/0x45f53c/-/-/-/0
     0x7f66901cc24b/0x45f555/-/-/-/0
     0x7f66901cc22e/0x7f66901cc23d/-/-/-/0
     0x7f66901cc1ff/0x7f66901cc20f/-/-/-/0
     0x7f66901cc1e8/0x7f66901cc1fc/-/-/-/0
    
    After:
    
     0x4fdbcd/0x4fdc03/P/-/-/0
     0x45f4c1/0x4fdba0/P/-/-/0
     0x45f544/0x45f4bb/P/-/-/0
     0x45f555/0x45f53c/P/-/-/0
     0x7f66901cc24b/0x45f555/P/-/-/0
     0x7f66901cc22e/0x7f66901cc23d/P/-/-/0
     0x7f66901cc1ff/0x7f66901cc20f/P/-/-/0
     0x7f66901cc1e8/0x7f66901cc1fc/P/-/-/0
    
    Cause:
    
    As mentioned in Software Development Manual vol 3, 17.4.8.1,
    IA32_PERF_CAPABILITIES[5:0] indicates the format of the address that is
    stored in the LBR stack. Knights Landing reports 1 (LBR_FORMAT_LIP) as
    its format. Despite that, registers containing FROM address of the branch,
    do have MISPREDICT bit but because of the format indicated in
    IA32_PERF_CAPABILITIES[5:0], LBR did not read MISPREDICT bit.
    
    Solution:
    
    Teach LBR about above Knights Landing quirk and make it read MISPREDICT bit.
    Signed-off-by: default avatarJacek Tomaka <jacek.tomaka@poczta.fm>
    Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Link: http://lkml.kernel.org/r/20180802013830.10600-1-jacekt@dugeo.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
    16160c19
lbr.c 32.1 KB