• Abhishek Sahu's avatar
    i2c: qup: schedule EOT and FLUSH tags at the end of transfer · c5adc0fa
    Abhishek Sahu authored
    The role of FLUSH and EOT tag is to flush already scheduled
    descriptors in BAM HW in case of error. EOT is required only
    when descriptors are scheduled in RX FIFO. If all the messages
    are WRITE, then only FLUSH tag will be used.
    
    A single BAM transfer can have multiple read and write messages.
    The EOT and FLUSH tags should be scheduled at the end of BAM HW
    descriptors. Since the READ and WRITE can be present in any order
    so for some of the cases, these tags are not being written
    correctly.
    
    Following is one of the example
    
       READ, READ, READ, READ
    
    Currently EOT and FLUSH tags are being written after each READ.
    If QUP gets NACK for first READ itself, then flush will be
    triggered. It will look for first FLUSH tag in TX FIFO and will
    stop there so only descriptors for first READ descriptors be
    flushed. All the scheduled descriptors should be cleared to
    generate BAM DMA completion.
    
    Now this patch is scheduling FLUSH and EOT only once after all the
    descriptors. So, flush will clear all the scheduled descriptors and
    BAM will generate the completion interrupt.
    Signed-off-by: default avatarAbhishek Sahu <absahu@codeaurora.org>
    Reviewed-by: default avatarSricharan R <sricharan@codeaurora.org>
    Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
    c5adc0fa
i2c-qup.c 37.9 KB