• Sricharan R's avatar
    dmaengine: qcom-bam: Process multiple pending descriptors · 6b4faeac
    Sricharan R authored
    The bam dmaengine has a circular FIFO to which we
    add hw descriptors that describes the transaction.
    The FIFO has space for about 4096 hw descriptors.
    
    Currently we add one descriptor and wait for it to
    complete with interrupt and then add the next pending
    descriptor. In this way, the FIFO is underutilized
    since only one descriptor is processed at a time, although
    there is space in FIFO for the BAM to process more.
    
    Instead keep adding descriptors to FIFO till its full,
    that allows BAM to continue to work on the next descriptor
    immediately after signalling completion interrupt for the
    previous descriptor.
    
    Also when the client has not set the DMA_PREP_INTERRUPT for
    a descriptor, then do not configure BAM to trigger a interrupt
    upon completion of that descriptor. This way we get a interrupt
    only for the descriptor for which DMA_PREP_INTERRUPT was
    requested and there signal completion of all the previous completed
    descriptors. So we still do callbacks for all requested descriptors,
    but just that the number of interrupts are reduced.
    
    CURRENT:
    
                ------      -------   ---------------
                |DES 0|     |DESC 1|  |DESC 2 + INT |
                ------      -------   ---------------
                   |           |            |
                   |           |            |
    INTERRUPT:   (INT)       (INT)	      (INT)
    CALLBACK:     (CB)        (CB)         (CB)
    
    		MTD_SPEEDTEST READ PAGE: 3560 KiB/s
    		MTD_SPEEDTEST WRITE PAGE: 2664 KiB/s
    		IOZONE READ: 2456 KB/s
    		IOZONE WRITE: 1230 KB/s
    
    	bam dma interrupts (after tests): 96508
    
    CHANGE:
    
            ------  -------    -------------
            |DES 0| |DESC 1   |DESC 2 + INT |
            ------  -------   --------------
    				|
    				|
              		      (INT)
    			      (CB for 0, 1, 2)
    
    		MTD_SPEEDTEST READ PAGE: 3860 KiB/s
    		MTD_SPEEDTEST WRITE PAGE: 2837 KiB/s
    		IOZONE READ: 2677 KB/s
    		IOZONE WRITE: 1308 KB/s
    
    	bam dma interrupts (after tests): 58806
    Signed-off-by: default avatarSricharan R <sricharan@codeaurora.org>
    Reviewed-by: default avatarAndy Gross <andy.gross@linaro.org>
    Tested-by: default avatarAbhishek Sahu <absahu@codeaurora.org>
    Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
    6b4faeac
bam_dma.c 38 KB