• Benson Leung's avatar
    drm/i915: Fix single msg gmbus_xfers writes · caae745a
    Benson Leung authored
    gmbus_xfer with a single message (particularly a single message write) would
    set Bus Cycle Select to 100b, the Gen Stop cycle, instead of 101b,
    No Index, Stop cycle. This would not start single message i2c transactions.
    
    Also, gmbus_xfer done: will disable the interface without checking if
    it is idle. In the case of writes, there will be no wait on status or delay
    to ensure the write starts and completes before the interface is turned off.
    
    Fixed the former issue by using the same cycle selection as used in the
    I2C_M_RD for the write case.
    GMBUS_CYCLE_WAIT | (i + 1 == num ? GMBUS_CYCLE_STOP : 0)
    Fixed the latter by waiting on GMBUS_ACTIVE to deassert before disable.
    
    Note from the grumpy d-i-n maintainer: The first hunk that changes the
    gmbus read path is just cosmetics to align the code with the write
    path.  I.e. the commit message above is slightly lying because the
    first issue is _only_ with writes (and not simply "particularly").
    Signed-off-by: default avatarBenson Leung <bleung@chromium.org>
    Reviewed-by: default avatarDaniel Kurtz <djkurtz@chromium.org>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    caae745a
intel_i2c.c 12.1 KB