• Tim Gore's avatar
    drm/i915: implement WaIncreaseDefaultTLBEntries · d5165ebd
    Tim Gore authored
    WaIncreaseDefaultTLBEntries increases the number of TLB
    entries available for GPGPU workloads and gives significant
    ( > 10% ) performance gain for some OCL benchmarks.
    Put this in a new function that can be a place for
    workarounds that are GT related but not required per ring.
    This function is called on driver load and also after a
    reset and on resume, so it is safe for workarounds that get
    clobbered in these situations. This function currently has
    just this one workaround.
    
    v2: This was originally split into 3 patches but following
      review feedback was squashed into 1.
      I have not incorporated some style comments from Chris
      Wilson as I felt that after defining and intialising a
      temporary variable and then adding an additional if block
      to only write the register if the temporary variable had
      been set, this didn't really give a net gain.
    
    v3: Resending in the hope that BAT will run
    
    v4: Change subject line to trigger BAT (please!)
    Signed-off-by: default avatarTim Gore <tim.gore@intel.com>
    Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
    Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
    Link: http://patchwork.freedesktop.org/patch/msgid/1454586574-2343-1-git-send-email-tim.gore@intel.com
    d5165ebd
i915_gem_gtt.c 94.2 KB