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Maxime Ripard authored
In order to prevent timeouts and stalls in the pipeline, the core clock needs to be maxed at 500MHz during a modeset on the BCM2711. Signed-off-by:
Maxime Ripard <maxime@cerno.tech> Tested-by:
Chanwoo Choi <cw00.choi@samsung.com> Tested-by:
Hoegeun Kwon <hoegeun.kwon@samsung.com> Tested-by:
Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by:
Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/37ed9e0124c5cce005ddc8dafe821d8b0da036ff.1599120059.git-series.maxime@cerno.tech
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