• Nicolas Pitre's avatar
    ARM: 7573/1: idmap: use flush_cache_louis() and flush TLBs only when necessary · e4067855
    Nicolas Pitre authored
    Flushing the cache is needed for the hardware to see the idmap table
    and therefore can be done at init time.  On ARMv7 it is not necessary to
    flush L2 so flush_cache_louis() is used here instead.
    
    There is no point flushing the cache in setup_mm_for_reboot() as the
    caller should, and already is, taking care of this.  If switching the
    memory map requires a cache flush, then cpu_switch_mm() already includes
    that operation.
    
    What is not done by cpu_switch_mm() on ASID capable CPUs is TLB flushing
    as the whole point of the ASID is to tag the TLBs and avoid flushing them
    on a context switch.  Since we don't have a clean ASID for the identity
    mapping, we need to flush the TLB explicitly in that case.  Otherwise
    this is already performed by cpu_switch_mm().
    Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
    Acked-by: default avatarWill Deacon <will.deacon@arm.com>
    Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
    e4067855
idmap.c 2.99 KB