• Lauri Kasanen's avatar
    drm: Add support for two-ended allocation, v3 · 62347f9e
    Lauri Kasanen authored
    Clients like i915 need to segregate cache domains within the GTT which
    can lead to small amounts of fragmentation. By allocating the uncached
    buffers from the bottom and the cacheable buffers from the top, we can
    reduce the amount of wasted space and also optimize allocation of the
    mappable portion of the GTT to only those buffers that require CPU
    access through the GTT.
    
    For other drivers, allocating small bos from one end and large ones
    from the other helps improve the quality of fragmentation.
    
    Based on drm_mm work by Chris Wilson.
    
    v3: Changed to use a TTM placement flag
    v2: Updated kerneldoc
    
    Cc: Chris Wilson <chris@chris-wilson.co.uk>
    Cc: Ben Widawsky <ben@bwidawsk.net>
    Cc: Christian König <deathsimple@vodafone.de>
    Signed-off-by: default avatarLauri Kasanen <cand@gmx.com>
    Signed-off-by: default avatarDavid Airlie <airlied@redhat.com>
    62347f9e
ttm_bo_manager.c 4.26 KB