The Allwinner A80 SoC has 3 display pipelines, of which some parts are
documented:

  - 3x display front ends (FE), documented
  - 2x display enhancement units (DEU), undocumented
  - 3x display back ends (BE), documented
  - 2x dynamic range controller (DRC), undocumented
  - 2x LCDC/TCONs, documented
  - 1x LCDC/TCON, undocumented, and probably not useable
  - 1x HDMI transmitter, undocumented but DesignWare compatible
  - 1x MERGE block, function unknown

This patch adds device nodes for the first 2 documented pipelines:

    FE0 - DEU0 - - BE0 - DRC0 - TCON0
		x
    FE1 - DEU1 - - BE1 - DRC1 - TCON1
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>