• Maciej W. Rozycki's avatar
    defxx: Correct DEFEA's ESIC MMIO decoding · fef85fc4
    Maciej W. Rozycki authored
    Use ESIC's memory area 1 (MEMCS1) and its Memory Address High Compare
    and Memory Address Low Compare registers to set up the MMIO range for
    decoding accesses to PDQ ASIC registers.  Previously the PDQ ASIC was
    thought to be addressable with the memory area 0 (MEMCS0) and its Memory
    Address Compare and Memory Address Mask registers.
    
    The MMIO range allocated for the option card is preset via ECU (EISA
    Configuration Utility) and can be disabled, so handle such a case
    gracefully too.
    Signed-off-by: default avatarMaciej W. Rozycki <macro@linux-mips.org>
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    fef85fc4
defxx.c 115 KB