• Will Deacon's avatar
    ARM: 7400/1: vfp: clear fpscr length and stride bits on entry to sig handler · ff9a184c
    Will Deacon authored
    The ARM PCS mandates that the length and stride bits of the fpscr are
    cleared on entry to and return from a public interface. Although signal
    handlers run asynchronously with respect to the interrupted function,
    the handler itself expects to run as though it has been called like a
    normal function.
    
    This patch updates the state mirroring the VFP hardware before entry to
    a signal handler so that it adheres to the PCS. Furthermore, we disable
    VFP to ensure that we trap on any floating point operation performed by
    the signal handler and synchronise the hardware appropriately. A check
    is inserted after the signal handler to avoid redundant flushing if VFP
    was not used.
    Reported-by: default avatarPeter Maydell <peter.maydell@linaro.org>
    Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
    Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
    ff9a184c
vfpmodule.c 18.4 KB