Commit 00c86590 authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville

ath9k_hw: clean up and fix initial noise floor calibration

On AR9003 the initial noise floor calibration is currently triggered
at the end of the reset without allowing the hardware to update the
baseband settings. This could potentially make scans in noisy
environments a bit more unreliable, so use the same calibration
sequence that is used on AR9002.
Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Acked-by: default avatarLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 1601b1e5
...@@ -721,7 +721,7 @@ static bool ar9002_hw_calibrate(struct ath_hw *ah, ...@@ -721,7 +721,7 @@ static bool ar9002_hw_calibrate(struct ath_hw *ah,
*/ */
ath9k_hw_loadnf(ah, ah->curchan); ath9k_hw_loadnf(ah, ah->curchan);
ath9k_hw_start_nfcal(ah); ath9k_hw_start_nfcal(ah, false);
} }
return iscaldone; return iscaldone;
...@@ -869,8 +869,7 @@ static bool ar9002_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan) ...@@ -869,8 +869,7 @@ static bool ar9002_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
ar9002_hw_pa_cal(ah, true); ar9002_hw_pa_cal(ah, true);
/* Do NF Calibration after DC offset and other calibrations */ /* Do NF Calibration after DC offset and other calibrations */
REG_WRITE(ah, AR_PHY_AGC_CONTROL, ath9k_hw_start_nfcal(ah, true);
REG_READ(ah, AR_PHY_AGC_CONTROL) | AR_PHY_AGC_CONTROL_NF);
ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL; ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
......
...@@ -156,7 +156,7 @@ static bool ar9003_hw_calibrate(struct ath_hw *ah, ...@@ -156,7 +156,7 @@ static bool ar9003_hw_calibrate(struct ath_hw *ah,
ath9k_hw_loadnf(ah, ah->curchan); ath9k_hw_loadnf(ah, ah->curchan);
/* start NF calibration, without updating BB NF register */ /* start NF calibration, without updating BB NF register */
ath9k_hw_start_nfcal(ah); ath9k_hw_start_nfcal(ah, false);
} }
return iscaldone; return iscaldone;
...@@ -762,6 +762,8 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah, ...@@ -762,6 +762,8 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
/* Revert chainmasks to their original values before NF cal */ /* Revert chainmasks to their original values before NF cal */
ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
ath9k_hw_start_nfcal(ah, true);
/* Initialize list pointers */ /* Initialize list pointers */
ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL; ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
......
...@@ -158,12 +158,18 @@ bool ath9k_hw_reset_calvalid(struct ath_hw *ah) ...@@ -158,12 +158,18 @@ bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
} }
EXPORT_SYMBOL(ath9k_hw_reset_calvalid); EXPORT_SYMBOL(ath9k_hw_reset_calvalid);
void ath9k_hw_start_nfcal(struct ath_hw *ah) void ath9k_hw_start_nfcal(struct ath_hw *ah, bool update)
{ {
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
AR_PHY_AGC_CONTROL_ENABLE_NF); AR_PHY_AGC_CONTROL_ENABLE_NF);
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
if (update)
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
AR_PHY_AGC_CONTROL_NO_UPDATE_NF); AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
else
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF); REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
} }
......
...@@ -108,7 +108,7 @@ struct ath9k_pacal_info{ ...@@ -108,7 +108,7 @@ struct ath9k_pacal_info{
}; };
bool ath9k_hw_reset_calvalid(struct ath_hw *ah); bool ath9k_hw_reset_calvalid(struct ath_hw *ah);
void ath9k_hw_start_nfcal(struct ath_hw *ah); void ath9k_hw_start_nfcal(struct ath_hw *ah, bool update);
void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan); void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan);
int16_t ath9k_hw_getnf(struct ath_hw *ah, int16_t ath9k_hw_getnf(struct ath_hw *ah,
struct ath9k_channel *chan); struct ath9k_channel *chan);
......
...@@ -1256,7 +1256,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, ...@@ -1256,7 +1256,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
if (ath9k_hw_channel_change(ah, chan)) { if (ath9k_hw_channel_change(ah, chan)) {
ath9k_hw_loadnf(ah, ah->curchan); ath9k_hw_loadnf(ah, ah->curchan);
ath9k_hw_start_nfcal(ah); ath9k_hw_start_nfcal(ah, true);
return 0; return 0;
} }
} }
...@@ -1461,11 +1461,8 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, ...@@ -1461,11 +1461,8 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
if (ah->btcoex_hw.enabled) if (ah->btcoex_hw.enabled)
ath9k_hw_btcoex_enable(ah); ath9k_hw_btcoex_enable(ah);
if (AR_SREV_9300_20_OR_LATER(ah)) { if (AR_SREV_9300_20_OR_LATER(ah))
ath9k_hw_loadnf(ah, curchan);
ath9k_hw_start_nfcal(ah);
ar9003_hw_bb_watchdog_config(ah); ar9003_hw_bb_watchdog_config(ah);
}
return 0; return 0;
} }
......
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