[ARM] Fix XScale "feature"

XScale does not guarantee that CPU control register writes complete
their side effects immediately.  In fact, Intel give sample code to
demonstrate a way to ensure that the effect of the write has occurred.
This is specific to Xscale, but the fix should work on any ARM CPU.
We therefore jump through the loops in "spirit" but not necessarily
in exactly the same way as the sample code.

arch/arm/kernel/head.S

@@ -117,8 +117,8 @@ __turn_mmu_on:
 #ifdef CONFIG_ALIGNMENT_TRAP
 	orr	r0, r0, #2			@ ...........A.
 #endif
-	mcr	p15, 0, r0, c1, c0
-	mov	r0, r0
+	mcr	p15, 0, r0, c1, c0, 0		@ write control reg
+	mrc	p15, 0, r0, c1, c0, 0		@ read it back.
 	mov	r0, r0
 	mov	r0, r0
 	mov	pc, lr