Commit 0232ba9c authored by Paul Mundt's avatar Paul Mundt

sh: pci: Kill off unused SH4_PCIC_NO_RESET code.

Nothing ended up using this anymore, so just kill it off.
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent f1a9ba8f
...@@ -39,8 +39,6 @@ static struct sh4_pci_address_map sh7751_pci_map = { ...@@ -39,8 +39,6 @@ static struct sh4_pci_address_map sh7751_pci_map = {
.base = SH7751_CS3_BASE_ADDR, .base = SH7751_CS3_BASE_ADDR,
.size = (64 << 20), /* 64MB */ .size = (64 << 20), /* 64MB */
}, },
.flags = SH4_PCIC_NO_RESET,
}; };
int __init pcibios_init_platform(void) int __init pcibios_init_platform(void)
......
...@@ -48,11 +48,6 @@ static struct sh4_pci_address_map sh7751_pci_map = { ...@@ -48,11 +48,6 @@ static struct sh4_pci_address_map sh7751_pci_map = {
.base = SH7751_CS3_BASE_ADDR, .base = SH7751_CS3_BASE_ADDR,
.size = 0x04000000, .size = 0x04000000,
}, },
.window1 = {
.base = 0x00000000, /* Unused */
.size = 0x00000000, /* Unused */
},
.flags = SH4_PCIC_NO_RESET,
}; };
int __init pcibios_init_platform(void) int __init pcibios_init_platform(void)
......
...@@ -57,8 +57,6 @@ static struct sh4_pci_address_map sh7780_pci_map = { ...@@ -57,8 +57,6 @@ static struct sh4_pci_address_map sh7780_pci_map = {
.base = SH7780_CS3_BASE_ADDR, .base = SH7780_CS3_BASE_ADDR,
.size = 0x04000000, .size = 0x04000000,
}, },
.flags = SH4_PCIC_NO_RESET,
}; };
int __init pcibios_init_platform(void) int __init pcibios_init_platform(void)
......
...@@ -56,13 +56,6 @@ static struct sh4_pci_address_map sh7751_pci_map = { ...@@ -56,13 +56,6 @@ static struct sh4_pci_address_map sh7751_pci_map = {
.base = SH7751_CS3_BASE_ADDR, .base = SH7751_CS3_BASE_ADDR,
.size = 0x04000000, .size = 0x04000000,
}, },
.window1 = {
.base = 0x00000000, /* Unused */
.size = 0x00000000, /* Unused */
},
.flags = SH4_PCIC_NO_RESET,
}; };
int __init pcibios_init_platform(void) int __init pcibios_init_platform(void)
......
...@@ -62,7 +62,6 @@ static struct sh4_pci_address_map sdk7780_pci_map = { ...@@ -62,7 +62,6 @@ static struct sh4_pci_address_map sdk7780_pci_map = {
.base = SH7780_CS3_BASE_ADDR, .base = SH7780_CS3_BASE_ADDR,
.size = 0x04000000, .size = 0x04000000,
}, },
.flags = SH4_PCIC_NO_RESET,
}; };
int __init pcibios_init_platform(void) int __init pcibios_init_platform(void)
......
...@@ -67,7 +67,6 @@ static struct sh4_pci_address_map se7780_pci_map = { ...@@ -67,7 +67,6 @@ static struct sh4_pci_address_map se7780_pci_map = {
.base = SH7780_CS2_BASE_ADDR, .base = SH7780_CS2_BASE_ADDR,
.size = 0x04000000, .size = 0x04000000,
}, },
.flags = SH4_PCIC_NO_RESET,
}; };
int __init pcibios_init_platform(void) int __init pcibios_init_platform(void)
......
...@@ -55,8 +55,6 @@ static struct sh4_pci_address_map sh7785_pci_map = { ...@@ -55,8 +55,6 @@ static struct sh4_pci_address_map sh7785_pci_map = {
.size = 0x20000000, .size = 0x20000000,
#endif #endif
}, },
.flags = SH4_PCIC_NO_RESET,
}; };
int __init pcibios_init_platform(void) int __init pcibios_init_platform(void)
......
...@@ -54,8 +54,6 @@ static struct sh4_pci_address_map sh7751_pci_map = { ...@@ -54,8 +54,6 @@ static struct sh4_pci_address_map sh7751_pci_map = {
.base = SH7751_CS2_BASE_ADDR, .base = SH7751_CS2_BASE_ADDR,
.size = SNAPGEAR_LSR1_SIZE, .size = SNAPGEAR_LSR1_SIZE,
}, },
.flags = SH4_PCIC_NO_RESET,
}; };
/* /*
......
...@@ -66,8 +66,6 @@ static struct sh4_pci_address_map sh7751_pci_map = { ...@@ -66,8 +66,6 @@ static struct sh4_pci_address_map sh7751_pci_map = {
.base = SH7751_CS2_BASE_ADDR, .base = SH7751_CS2_BASE_ADDR,
.size = SH7751_MEM_REGION_SIZE*2, .size = SH7751_MEM_REGION_SIZE*2,
}, },
.flags = SH4_PCIC_NO_RESET,
}; };
int __init pcibios_init_platform(void) int __init pcibios_init_platform(void)
......
...@@ -149,9 +149,6 @@ ...@@ -149,9 +149,6 @@
#define SH4_PCIPDTR_PB0 0x000000001 /* Port 0 Enable */ #define SH4_PCIPDTR_PB0 0x000000001 /* Port 0 Enable */
#define SH4_PCIPDR 0x220 /* Port IO Data Register */ #define SH4_PCIPDR 0x220 /* Port IO Data Register */
/* Flags */
#define SH4_PCIC_NO_RESET 0x0001
/* arch/sh/kernel/drivers/pci/ops-sh4.c */ /* arch/sh/kernel/drivers/pci/ops-sh4.c */
extern struct pci_ops sh4_pci_ops; extern struct pci_ops sh4_pci_ops;
int sh4_pci_check_direct(struct pci_channel *chan); int sh4_pci_check_direct(struct pci_channel *chan);
...@@ -165,7 +162,6 @@ struct sh4_pci_address_space { ...@@ -165,7 +162,6 @@ struct sh4_pci_address_space {
struct sh4_pci_address_map { struct sh4_pci_address_map {
struct sh4_pci_address_space window0; struct sh4_pci_address_space window0;
struct sh4_pci_address_space window1; struct sh4_pci_address_space window1;
unsigned long flags;
}; };
static inline void pci_write_reg(struct pci_channel *chan, static inline void pci_write_reg(struct pci_channel *chan,
......
...@@ -99,21 +99,6 @@ int __init sh7751_pcic_init(struct pci_channel *chan, ...@@ -99,21 +99,6 @@ int __init sh7751_pcic_init(struct pci_channel *chan,
word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0; word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0;
pci_write_reg(chan, word, SH4_PCIPINT); pci_write_reg(chan, word, SH4_PCIPINT);
/*
* This code is unused for some boards as it is done in the
* bootloader and doing it here means the MAC addresses loaded
* by the bootloader get lost.
*/
if (!(map->flags & SH4_PCIC_NO_RESET)) {
/* toggle PCI reset pin */
word = SH4_PCICR_PREFIX | SH4_PCICR_PRST;
pci_write_reg(chan, word, SH4_PCICR);
/* Wait for a long time... not 1 sec. but long enough */
mdelay(100);
word = SH4_PCICR_PREFIX;
pci_write_reg(chan, word, SH4_PCICR);
}
/* set the command/status bits to: /* set the command/status bits to:
* Wait Cycle Control + Parity Enable + Bus Master + * Wait Cycle Control + Parity Enable + Bus Master +
* Mem space enable * Mem space enable
......
...@@ -96,21 +96,6 @@ int __init sh7780_pcic_init(struct pci_channel *chan, ...@@ -96,21 +96,6 @@ int __init sh7780_pcic_init(struct pci_channel *chan,
{ {
u32 word; u32 word;
/*
* This code is unused for some boards as it is done in the
* bootloader and doing it here means the MAC addresses loaded
* by the bootloader get lost.
*/
if (!(map->flags & SH4_PCIC_NO_RESET)) {
/* toggle PCI reset pin */
word = SH4_PCICR_PREFIX | SH4_PCICR_PRST;
pci_write_reg(chan, word, SH4_PCICR);
/* Wait for a long time... not 1 sec. but long enough */
mdelay(100);
word = SH4_PCICR_PREFIX;
pci_write_reg(chan, word, SH4_PCICR);
}
/* set the command/status bits to: /* set the command/status bits to:
* Wait Cycle Control + Parity Enable + Bus Master + * Wait Cycle Control + Parity Enable + Bus Master +
* Mem space enable * Mem space enable
......
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