Commit 0429fba6 authored by Justin T. Gibbs's avatar Justin T. Gibbs

Update to aic7xxx 6.2.22 and aic79xx 1.3.0_ALPHA2

parent 52aca51a
...@@ -277,57 +277,8 @@ config SCSI_AACRAID ...@@ -277,57 +277,8 @@ config SCSI_AACRAID
tristate "Adaptec AACRAID support (EXPERIMENTAL)" tristate "Adaptec AACRAID support (EXPERIMENTAL)"
depends on EXPERIMENTAL && SCSI && PCI depends on EXPERIMENTAL && SCSI && PCI
choice
prompt "Adaptec AIC7xxx support"
optional
depends on SCSI
source "drivers/scsi/aic7xxx/Kconfig" source "drivers/scsi/aic7xxx/Kconfig"
config SCSI_AIC7XXX_OLD
tristate "Old driver"
help
WARNING This driver is an older aic7xxx driver and is no longer
under active development. Adaptec, Inc. is writing a new driver to
take the place of this one, and it is recommended that whenever
possible, people should use the new Adaptec written driver instead
of this one. This driver will eventually be phased out entirely.
This is support for the various aic7xxx based Adaptec SCSI
controllers. These include the 274x EISA cards; 284x VLB cards;
2902, 2910, 293x, 294x, 394x, 3985 and several other PCI and
motherboard based SCSI controllers from Adaptec. It does not support
the AAA-13x RAID controllers from Adaptec, nor will it likely ever
support them. It does not support the 2920 cards from Adaptec that
use the Future Domain SCSI controller chip. For those cards, you
need the "Future Domain 16xx SCSI support" driver.
In general, if the controller is based on an Adaptec SCSI controller
chip from the aic777x series or the aic78xx series, this driver
should work. The only exception is the 7810 which is specifically
not supported (that's the RAID controller chip on the AAA-13x
cards).
Note that the AHA2920 SCSI host adapter is *not* supported by this
driver; choose "Future Domain 16xx SCSI support" instead if you have
one of those.
Information on the configuration options for this controller can be
found by checking the help file for each of the available
configuration options. You should read
<file:Documentation/scsi/aic7xxx_old.txt> at a minimum before
contacting the maintainer with any questions. The SCSI-HOWTO,
available from <http://www.linuxdoc.org/docs.html#howto>, can also
be of great help.
If you want to compile this driver as a module ( = code which can be
inserted in and removed from the running kernel whenever you want),
say M here and read <file:Documentation/modules.txt>. The module
will be called aic7xxx_old.o.
endchoice
# All the I2O code and drivers do not seem to be 64bit safe. # All the I2O code and drivers do not seem to be 64bit safe.
config SCSI_DPT_I2O config SCSI_DPT_I2O
tristate "Adaptec I2O RAID support " tristate "Adaptec I2O RAID support "
......
#
# AIC7XXX and AIC79XX 2.5.X Kernel configuration File.
# $Id: //depot/linux-aic79xx-2.5.0/drivers/scsi/aic7xxx/Kconfig#2 $
#
config SCSI_AIC7XXX config SCSI_AIC7XXX
tristate "New driver" tristate "Adaptec AIC7xxx Fast -> U160 support"
help ---help---
This driver supports all of Adaptec's PCI based SCSI controllers This driver supports all of Adaptec's Fast through Ultra 160 PCI
(not the hardware RAID controllers though) as well as the aic7770 based SCSI controllers as well as the aic7770 based EISA and VLB
based EISA and VLB SCSI controllers (the 274x and 284x series). SCSI controllers (the 274x and 284x series). For AAA and ARO based
This is an Adaptec sponsored driver written by Justin Gibbs. It is configurations, only SCSI functionality is provided.
intended to replace the previous aic7xxx driver maintained by Doug
Ledford since Doug is no longer maintaining that driver.
If you want to compile the driver as a module ( = code which can be
inserted in and removed from the running kernel whenever you want),
say M here and read <file:Documentation/modules.txt>. The module
will be called aic7xxx.o.
config AIC7XXX_CMDS_PER_DEVICE config AIC7XXX_CMDS_PER_DEVICE
int "Maximum number of TCQ commands per device" int "Maximum number of TCQ commands per device"
depends on SCSI_AIC7XXX depends on SCSI_AIC7XXX
default "253" default "32"
---help--- ---help---
Specify the number of commands you would like to allocate per SCSI Specify the number of commands you would like to allocate per SCSI
device when Tagged Command Queueing (TCQ) is enabled on that device. device when Tagged Command Queueing (TCQ) is enabled on that device.
This is an upper bound value for the number of tagged transactions This is an upper bound value for the number of tagged transactions
to be used for any device. The aic7xxx driver will automatically to be used for any device. The aic7xxx driver will automatically
vary this number based on device behavior. For devices with a vary this number based on device behavior. For devices with a
fixed maximum, the driver will eventually lock to this maximum fixed maximum, the driver will eventually lock to this maximum
and display a console message inidicating this value. and display a console message inidicating this value.
Note: Unless you experience some type of device failure, the default Due to resource allocation issues in the Linux SCSI mid-layer, using
value, no enforced limit, should work for you. a high number of commands per device may result in memory allocation
failures when many devices are attached to the system. For this reason,
the default is set to 32. Higher values may result in higer performance
on some devices. The upper bound is 253. 0 disables tagged queueing.
Default: 253 Per device tag depth can be controlled via the kernel command line
"tag_info" option. See drivers/scsi/aic7xxx/README.aic7xxx
for details.
config AIC7XXX_RESET_DELAY_MS config AIC7XXX_RESET_DELAY_MS
int "Initial bus reset delay in milli-seconds" int "Initial bus reset delay in milli-seconds"
depends on SCSI_AIC7XXX depends on SCSI_AIC7XXX
default "15000" default "15000"
help ---help---
The number of milliseconds to delay after an initial bus reset. The number of milliseconds to delay after an initial bus reset.
The bus settle delay following all error recovery actions is The bus settle delay following all error recovery actions is
dictated by the SCSI layer and is not affected by this value. dictated by the SCSI layer and is not affected by this value.
Default: 15000 (15 seconds) Default: 15000 (15 seconds)
config AIC7XXX_PROBE_EISA_VL
bool "Probe for EISA and VL AIC7XXX Adapters"
help
Probe for EISA and VLB Aic7xxx controllers. In many newer systems,
the invasive probes necessary to detect these controllers can cause
other devices to fail. For this reason, the non-PCI probe code is
disabled by default. The current value of this option can be "toggled"
via the no_probe kernel command line option.
config AIC7XXX_BUILD_FIRMWARE config AIC7XXX_BUILD_FIRMWARE
bool "Build Adapter Firmware with Kernel Build" bool "Build Adapter Firmware with Kernel Build"
depends on SCSI_AIC7XXX depends on SCSI_AIC7XXX
help help
This option should only be enabled if you are modifying the firmware This option should only be enabled if you are modifying the firmware
source to the aic7xxx driver and wish to have the generated firmware source to the aic7xxx driver and wish to have the generated firmware
include files updated during a normal kernel build. The assembler include files updated during a normal kernel build. The assembler
for the firmware requires lex and yacc or their equivalents, as well for the firmware requires lex and yacc or their equivalents, as well
as the db v1 library. You may have to install additional packages as the db v1 library. You may have to install additional packages
or modify the assembler make file or the files it includes if your or modify the assembler Makefile or the files it includes if your
build environment is different than that of the author. build environment is different than that of the author.
config AIC7XXX_DEBUG_ENABLE
bool "Compile in Debugging Code"
depends on SCSI_AIC7XXX
default y
help
Compile in aic7xxx debugging code that can be useful in diagnosing
driver errors.
config AIC7XXX_DEBUG_MASK
int "Debug code enable mask (2047 for all debugging)"
depends on SCSI_AIC7XXX
default "0"
help
Bit mask of debug options that is only valid if the
CONFIG_AIC7XXX_DEBUG_ENBLE option is enabled. The bits in this mask
are defined in the drivers/scsi/aic7xxx/aic7xxx.h - search for the
variable ahc_debug in that file to find them.
config AIC7XXX_REG_PRETTY_PRINT
bool "Decode registers during diagnostics"
depends on SCSI_AIC7XXX
default y
help
Compile in register value tables for the output of expanded register
contents in diagnostics. This make it much easier to understand debug
output without having to refer to a data book and/or the aic7xxx.reg
file.
config SCSI_AIC79XX
tristate "Adaptec AIC79xx U320 support"
help
This driver supports all of Adaptec's Ultra 320 PCI-X
based SCSI controllers.
config AIC79XX_CMDS_PER_DEVICE
int "Maximum number of TCQ commands per device"
depends on SCSI_AIC79XX
default "32"
---help---
Specify the number of commands you would like to allocate per SCSI
device when Tagged Command Queueing (TCQ) is enabled on that device.
This is an upper bound value for the number of tagged transactions
to be used for any device. The aic7xxx driver will automatically
vary this number based on device behavior. For devices with a
fixed maximum, the driver will eventually lock to this maximum
and display a console message inidicating this value.
Due to resource allocation issues in the Linux SCSI mid-layer, using
a high number of commands per device may result in memory allocation
failures when many devices are attached to the system. For this reason,
the default is set to 32. Higher values may result in higer performance
on some devices. The upper bound is 253. 0 disables tagged queueing.
Per device tag depth can be controlled via the kernel command line
"tag_info" option. See drivers/scsi/aic7xxx/README.aic79xx
for details.
config AIC79XX_RESET_DELAY_MS
int "Initial bus reset delay in milli-seconds"
depends on SCSI_AIC79XX
default "15000"
---help---
The number of milliseconds to delay after an initial bus reset.
The bus settle delay following all error recovery actions is
dictated by the SCSI layer and is not affected by this value.
Default: 15000 (15 seconds)
config AIC79XX_BUILD_FIRMWARE
bool "Build Adapter Firmware with Kernel Build"
depends on SCSI_AIC79XX
help
This option should only be enabled if you are modifying the firmware
source to the aic79xx driver and wish to have the generated firmware
include files updated during a normal kernel build. The assembler
for the firmware requires lex and yacc or their equivalents, as well
as the db v1 library. You may have to install additional packages
or modify the assembler Makefile or the files it includes if your
build environment is different than that of the author.
config AIC79XX_ENABLE_RD_STRM
bool "Enable Read Streaming for All Targets"
depends on SCSI_AIC79XX
help
Read Streaming is a U320 protocol option that should enhance
performance. Early U320 drive firmware actually performs slower
with read streaming enabled so it is disabled by default. Read
Streaming can be configured in much the same way as tagged queueing
using the "rd_strm" command line option. See
drivers/scsi/aic7xxx/README.aic79xx for details.
config AIC79XX_DEBUG_ENABLE
bool "Compile in Debugging Code"
depends on SCSI_AIC79XX
default y
help
Compile in aic79xx debugging code that can be useful in diagnosing
driver errors.
config AIC79XX_DEBUG_MASK
int "Debug code enable mask (16383 for all debugging)"
depends on SCSI_AIC79XX
default "0"
help
Bit mask of debug options that is only valid if the
CONFIG_AIC79XX_DEBUG_ENBLE option is enabled. The bits in this mask
are defined in the drivers/scsi/aic7xxx/aic79xx.h - search for the
variable ahd_debug in that file to find them.
config AIC79XX_REG_PRETTY_PRINT
bool "Decode registers during diagnostics"
depends on SCSI_AIC79XX
default y
help
Compile in register value tables for the output of expanded register
contents in diagnostics. This make it much easier to understand debug
output without having to refer to a data book and/or the aic7xxx.reg
file.
...@@ -2,6 +2,9 @@ ...@@ -2,6 +2,9 @@
# Makefile for the Linux aic7xxx SCSI driver. # Makefile for the Linux aic7xxx SCSI driver.
# #
# Let kbuild descend into aicasm when cleaning # Let kbuild descend into aicasm when cleaning
#
# $Id: //depot/linux-aic79xx-2.5.0/drivers/scsi/aic7xxx/Makefile#1 $
#
subdir- += aicasm subdir- += aicasm
obj-$(CONFIG_SCSI_AIC7XXX) += aic7xxx.o obj-$(CONFIG_SCSI_AIC7XXX) += aic7xxx.o
......
...@@ -109,7 +109,7 @@ The following information is available in this file: ...@@ -109,7 +109,7 @@ The following information is available in this file:
Default Value: disabled Default Value: disabled
----------------------------------------------------------------- -----------------------------------------------------------------
Option: reverse_scan Option: reverse_scan
Definition: Probe the scsi bus in reverse oder, starting Definition: Probe the scsi bus in reverse order, starting
with target 15 with target 15
Possible Values: This option is a flag Possible Values: This option is a flag
Default Value: disabled Default Value: disabled
...@@ -144,20 +144,20 @@ The following information is available in this file: ...@@ -144,20 +144,20 @@ The following information is available in this file:
Possible Values: 1 - 253 Possible Values: 1 - 253
Default Value: 32 Default Value: 32
----------------------------------------------------------------- -----------------------------------------------------------------
Option: rd_strm: {{rd_strm_bitmask}[,{rd_strm_bitmask}...]} Option: rd_strm: {rd_strm_bitmask[,rd_strm_bitmask...]}
Definition: Enable read streaming on a per target basis. Definition: Enable read streaming on a per target basis.
The rd_strm_bitmask is a 16 bit hex value in which The rd_strm_bitmask is a 16 bit hex value in which
each bit represents a target. Setting the target's each bit represents a target. Setting the target's
bit to '1' enables read streaming for that bit to '1' enables read streaming for that
target. Controllers may be ommitted indicating that target. Controllers may be ommitted indicating that
they should retain the default read streaming setting. they should retain the default read streaming setting.
Example: rd_strm:{{0x0041}} Example: rd_strm:{0x0041}
On Controller 0 On Controller 0
enables read streaming for targets 0 and 6. enables read streaming for targets 0 and 6.
disables read streaming for targets 1-5,7-15. disables read streaming for targets 1-5,7-15.
All other targets retain the default read All other targets retain the default read
streaming setting. streaming setting.
Example: rd_strm:{{0x0023},{},{0xFFFF}} Example: rd_strm:{0x0023,,0xFFFF}
On Controller 0 On Controller 0
enables read streaming for targets 1,2, and 5. enables read streaming for targets 1,2, and 5.
disables read streaming for targets 3,4,6-15. disables read streaming for targets 3,4,6-15.
...@@ -168,6 +168,46 @@ The following information is available in this file: ...@@ -168,6 +168,46 @@ The following information is available in this file:
Possible Values: 0x0000 - 0xffff Possible Values: 0x0000 - 0xffff
Default Value: 0x0000 Default Value: 0x0000
-----------------------------------------------------------------
Option: precomp: {value[,value...]}
Definition: Set IO Cell precompensation value on a per-controller
basis.
Controllers may be ommitted indicating that
they should retain the default precompensation setting.
Example: precomp:{0x1}
On Controller 0 set precompensation to 1.
Example: precomp:{1,,7}
On Controller 0 set precompensation to 1.
On Controller 2 set precompensation to 8.
Possible Values: 0 - 7
Default Value: Varies based on chip revision
-----------------------------------------------------------------
Option: slewrate: {value[,value...]}
Definition: Set IO Cell slew rate on a per-controller basis.
Controllers may be ommitted indicating that
they should retain the default slew rate setting.
Example: slewrate:{0x1}
On Controller 0 set slew rate to 1.
Example: slewrate :{1,,8}
On Controller 0 set slew rate to 1.
On Controller 2 set slew rate to 8.
Possible Values: 0 - 15
Default Value: Varies based on chip revision
-----------------------------------------------------------------
Option: amplitude: {value[,value...]}
Definition: Set IO Cell signal amplitude on a per-controller basis.
Controllers may be ommitted indicating that
they should retain the default read streaming setting.
Example: amplitude:{0x1}
On Controller 0 set amplitude to 1.
Example: amplitude :{1,,7}
On Controller 0 set amplitude to 1.
On Controller 2 set amplitude to 7.
Possible Values: 1 - 7
Default Value: Varies based on chip revision
----------------------------------------------------------------- -----------------------------------------------------------------
Option: seltime:[value] Option: seltime:[value]
Definition: Specifies the selection timeout value Definition: Specifies the selection timeout value
......
...@@ -168,7 +168,7 @@ The following information is available in this file: ...@@ -168,7 +168,7 @@ The following information is available in this file:
Default Value: disabled Default Value: disabled
----------------------------------------------------------------- -----------------------------------------------------------------
Option: reverse_scan Option: reverse_scan
Definition: Probe the scsi bus in reverse oder, starting Definition: Probe the scsi bus in reverse order, starting
with target 15 with target 15
Possible Values: This option is a flag Possible Values: This option is a flag
Default Value: disabled Default Value: disabled
......
...@@ -37,7 +37,7 @@ ...@@ -37,7 +37,7 @@
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES. * POSSIBILITY OF SUCH DAMAGES.
* *
* $Id: //depot/aic7xxx/aic7xxx/aic7770.c#25 $ * $Id: //depot/aic7xxx/aic7xxx/aic7770.c#27 $
* *
* $FreeBSD$ * $FreeBSD$
*/ */
...@@ -56,7 +56,8 @@ ...@@ -56,7 +56,8 @@
#define ID_AHA_274x 0x04907771 #define ID_AHA_274x 0x04907771
#define ID_AHA_284xB 0x04907756 /* BIOS enabled */ #define ID_AHA_284xB 0x04907756 /* BIOS enabled */
#define ID_AHA_284x 0x04907757 /* BIOS disabled*/ #define ID_AHA_284x 0x04907757 /* BIOS disabled*/
#define ID_AIC_7782 0x04907782 #define ID_OLV_274x 0x04907782 /* Olivetti OEM */
#define ID_OLV_274xD 0x04907783 /* Olivetti OEM (Differential) */
static int aha2840_load_seeprom(struct ahc_softc *ahc); static int aha2840_load_seeprom(struct ahc_softc *ahc);
static ahc_device_setup_t ahc_aic7770_VL_setup; static ahc_device_setup_t ahc_aic7770_VL_setup;
...@@ -78,18 +79,23 @@ struct aic7770_identity aic7770_ident_table [] = ...@@ -78,18 +79,23 @@ struct aic7770_identity aic7770_ident_table [] =
"Adaptec 284X SCSI adapter", "Adaptec 284X SCSI adapter",
ahc_aic7770_VL_setup ahc_aic7770_VL_setup
}, },
/* Generic chip probes for devices we don't know 'exactly' */
{ {
ID_AIC7770, ID_OLV_274x,
0xFFFFFFFF, 0xFFFFFFFF,
"Adaptec aic7770 SCSI adapter", "Adaptec (Olivetti OEM) 274X SCSI adapter",
ahc_aic7770_EISA_setup
},
{
ID_OLV_274xD,
0xFFFFFFFF,
"Adaptec (Olivetti OEM) 274X Differential SCSI adapter",
ahc_aic7770_EISA_setup ahc_aic7770_EISA_setup
}, },
/* Generic chip probes for devices we don't know 'exactly' */
{ {
/* (Olivetti 2 channel EISA) */ ID_AIC7770,
ID_AIC_7782,
0xFFFFFFFF, 0xFFFFFFFF,
"Adaptec aic7782 SCSI adapter", "Adaptec aic7770 SCSI adapter",
ahc_aic7770_EISA_setup ahc_aic7770_EISA_setup
} }
}; };
...@@ -273,7 +279,7 @@ aha2840_load_seeprom(struct ahc_softc *ahc) ...@@ -273,7 +279,7 @@ aha2840_load_seeprom(struct ahc_softc *ahc)
if (bootverbose) if (bootverbose)
printf("%s: Reading SEEPROM...", ahc_name(ahc)); printf("%s: Reading SEEPROM...", ahc_name(ahc));
have_seeprom = ahc_read_seeprom(&sd, (uint16_t *)&sc, have_seeprom = ahc_read_seeprom(&sd, (uint16_t *)sc,
/*start_addr*/0, sizeof(sc)/2); /*start_addr*/0, sizeof(sc)/2);
if (have_seeprom) { if (have_seeprom) {
......
This diff is collapsed.
...@@ -39,7 +39,7 @@ ...@@ -39,7 +39,7 @@
* *
* $FreeBSD$ * $FreeBSD$
*/ */
VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#45 $" VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#56 $"
/* /*
* This file is processed by the aic7xxx_asm utility for use in assembling * This file is processed by the aic7xxx_asm utility for use in assembling
...@@ -72,6 +72,19 @@ VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#45 $" ...@@ -72,6 +72,19 @@ VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#45 $"
xor MODE_PTR, MK_MODE(M_DFF1, M_DFF1); \ xor MODE_PTR, MK_MODE(M_DFF1, M_DFF1); \
} }
#define RESTORE_MODE(mode) \
if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) { \
mov mode call set_mode_work_around; \
} else { \
mov MODE_PTR, mode; \
}
#define SET_SEQINTCODE(code) \
if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) { \
mvi code call set_seqint_work_around; \
} else { \
mvi SEQINTCODE, code; \
}
/* /*
* Mode Pointer * Mode Pointer
...@@ -114,7 +127,8 @@ register SEQINTCODE { ...@@ -114,7 +127,8 @@ register SEQINTCODE {
address 0x002 address 0x002
access_mode RW access_mode RW
field { field {
BAD_PHASE 1, /* unknown scsi bus phase */ NO_SEQINT, /* No seqint pending. */
BAD_PHASE, /* unknown scsi bus phase */
SEND_REJECT, /* sending a message reject */ SEND_REJECT, /* sending a message reject */
PROTO_VIOLATION, /* Protocol Violation */ PROTO_VIOLATION, /* Protocol Violation */
NO_MATCH, /* no cmd match for reconnect */ NO_MATCH, /* no cmd match for reconnect */
...@@ -158,7 +172,12 @@ register SEQINTCODE { ...@@ -158,7 +172,12 @@ register SEQINTCODE {
CFG4ISTAT_INTR, CFG4ISTAT_INTR,
STATUS_OVERRUN, STATUS_OVERRUN,
CFG4OVERRUN, CFG4OVERRUN,
ENTERING_NONPACK ENTERING_NONPACK,
TRACEPOINT0,
TRACEPOINT1,
TRACEPOINT2,
TRACEPOINT3,
SAW_HWERR
} }
} }
...@@ -171,6 +190,7 @@ register CLRINT { ...@@ -171,6 +190,7 @@ register CLRINT {
field CLRHWERRINT 0x80 /* Rev B or greater */ field CLRHWERRINT 0x80 /* Rev B or greater */
field CLRBRKADRINT 0x40 field CLRBRKADRINT 0x40
field CLRSWTMINT 0x20 field CLRSWTMINT 0x20
field CLRPCIINT 0x10
field CLRSCSIINT 0x08 field CLRSCSIINT 0x08
field CLRSEQINT 0x04 field CLRSEQINT 0x04
field CLRCMDINT 0x02 field CLRCMDINT 0x02
...@@ -366,6 +386,7 @@ register DFCNTRL { ...@@ -366,6 +386,7 @@ register DFCNTRL {
access_mode RW access_mode RW
modes M_DFF0, M_DFF1 modes M_DFF0, M_DFF1
field PRELOADEN 0x80 field PRELOADEN 0x80
field SCSIENWRDIS 0x40 /* Rev B only. */
field SCSIEN 0x20 field SCSIEN 0x20
field SCSIENACK 0x20 field SCSIENACK 0x20
field HDMAEN 0x08 field HDMAEN 0x08
...@@ -462,6 +483,17 @@ register HODMAADR { ...@@ -462,6 +483,17 @@ register HODMAADR {
modes M_SCSI modes M_SCSI
} }
/*
* PCI PLL Delay.
*/
register PLLDELAY {
address 0x070
access_mode RW
size 1
modes M_CFG
field SPLIT_DROP_REQ 0x80
}
/* /*
* Data Channel Host Count * Data Channel Host Count
*/ */
...@@ -1137,7 +1169,7 @@ register MSIPCISTAT { ...@@ -1137,7 +1169,7 @@ register MSIPCISTAT {
* PCI Status for Target * PCI Status for Target
*/ */
register TARGPCISTAT { register TARGPCISTAT {
address 0x0A6 address 0x0A7
access_mode RW access_mode RW
modes M_CFG modes M_CFG
field DPE 0x80 field DPE 0x80
...@@ -1561,9 +1593,24 @@ register DFFSTAT { ...@@ -1561,9 +1593,24 @@ register DFFSTAT {
modes M_SCSI modes M_SCSI
field FIFO1FREE 0x20 field FIFO1FREE 0x20
field FIFO0FREE 0x10 field FIFO0FREE 0x10
field CURRFIFO 0x01 /*
* On the B, this enum only works
* in the read direction. For writes,
* you must use the B version of the
* CURRFIFO_0 definition which is defined
* as a constant outside of this register
* definition to avoid confusing the
* register pretty printing code.
*/
enum CURRFIFO 0x03 {
CURRFIFO_0,
CURRFIFO_1,
CURRFIFO_NONE 0x3
}
} }
const B_CURRFIFO_0 0x2
/* /*
* SCSI Bus Target IDs * SCSI Bus Target IDs
* Bitmask of observed targets on the bus. * Bitmask of observed targets on the bus.
...@@ -2208,6 +2255,7 @@ register DFFSXFRCTL { ...@@ -2208,6 +2255,7 @@ register DFFSXFRCTL {
address 0x05A address 0x05A
access_mode RW access_mode RW
modes M_DFF0, M_DFF1 modes M_DFF0, M_DFF1
field DFFBITBUCKET 0x08
field CLRSHCNT 0x04 field CLRSHCNT 0x04
field CLRCHN 0x02 field CLRCHN 0x02
field RSTCHN 0x01 field RSTCHN 0x01
...@@ -2222,7 +2270,17 @@ register NEXTSCB { ...@@ -2222,7 +2270,17 @@ register NEXTSCB {
size 2 size 2
modes M_SCSI modes M_SCSI
} }
/* Rev B only. */
register LQOSCSCTL {
address 0x05A
access_mode RW
size 1
modes M_CFG
field LQOH2A_VERSION 0x80
field LQONOCHKOVER 0x01
}
/* /*
* SEQ Interrupts * SEQ Interrupts
*/ */
...@@ -2427,7 +2485,10 @@ register NEGCONOPTS { ...@@ -2427,7 +2485,10 @@ register NEGCONOPTS {
address 0x064 address 0x064
access_mode RW access_mode RW
modes M_SCSI modes M_SCSI
field ENAIP 0x08 field ENSNAPSHOT 0x40
field RTI_WRTDIS 0x20
field RTI_OVRDTRN 0x10
field ENSLOWCRC 0x08
field ENAUTOATNI 0x04 field ENAUTOATNI 0x04
field ENAUTOATNO 0x02 field ENAUTOATNO 0x02
field WIDEXFER 0x01 field WIDEXFER 0x01
...@@ -2447,7 +2508,7 @@ register SCSCHKN { ...@@ -2447,7 +2508,7 @@ register SCSCHKN {
access_mode RW access_mode RW
modes M_CFG modes M_CFG
field STSELSKIDDIS 0x40 field STSELSKIDDIS 0x40
field CURFIFODEF 0x20 field CURRFIFODEF 0x20
field WIDERESEN 0x10 field WIDERESEN 0x10
field SDONEMSKDIS 0x08 field SDONEMSKDIS 0x08
field DFFACTCLR 0x04 field DFFACTCLR 0x04
...@@ -2455,13 +2516,28 @@ register SCSCHKN { ...@@ -2455,13 +2516,28 @@ register SCSCHKN {
field LSTSGCLRDIS 0x01 field LSTSGCLRDIS 0x01
} }
const AHD_ANNEXCOL_PRECOMP 4 const AHD_ANNEXCOL_PER_DEV0 4
const AHD_NUM_PER_DEV_ANNEXCOLS 4
const AHD_ANNEXCOL_PRECOMP_SLEW 4
const AHD_PRECOMP_MASK 0x07 const AHD_PRECOMP_MASK 0x07
const AHD_PRECOMP_SHIFT 0
const AHD_PRECOMP_CUTBACK_17 0x04 const AHD_PRECOMP_CUTBACK_17 0x04
const AHD_PRECOMP_CUTBACK_29 0x06 const AHD_PRECOMP_CUTBACK_29 0x06
const AHD_PRECOMP_CUTBACK_37 0x07 const AHD_PRECOMP_CUTBACK_37 0x07
const AHD_PRECOMP_FASTSLEW 0x40 const AHD_SLEWRATE_MASK 0x78
const AHD_NUM_ANNEXCOLS 4 const AHD_SLEWRATE_SHIFT 3
/*
* Rev A has only a single bit of slew adjustment.
* Rev B has 4 bits.
*/
const AHD_SLEWRATE_DEF_REVA 0x01
const AHD_SLEWRATE_DEF_REVB 0x08
/* Rev A does not have any amplitude setting. */
const AHD_ANNEXCOL_AMPLITUDE 6
const AHD_AMPLITUDE_MASK 0x7
const AHD_AMPLITUDE_SHIFT 0
const AHD_AMPLITUDE_DEF 0x7
/* /*
* Negotiation Table Annex Data Port. * Negotiation Table Annex Data Port.
...@@ -2689,7 +2765,8 @@ register CCSGCTL { ...@@ -2689,7 +2765,8 @@ register CCSGCTL {
modes M_DFF0, M_DFF1 modes M_DFF0, M_DFF1
field CCSGDONE 0x80 field CCSGDONE 0x80
field SG_CACHE_AVAIL 0x10 field SG_CACHE_AVAIL 0x10
field CCSGEN 0x08 field CCSGENACK 0x08
mask CCSGEN 0x0C
field SG_FETCH_REQ 0x02 field SG_FETCH_REQ 0x02
field CCSGRESET 0x01 field CCSGRESET 0x01
} }
...@@ -2983,7 +3060,10 @@ register WRTBIASCTL { ...@@ -2983,7 +3060,10 @@ register WRTBIASCTL {
field XMITMANVAL 0x3F field XMITMANVAL 0x3F
} }
const WRTBIASCTL_CPQ_DEFAULT 0x97 /*
* Currently the WRTBIASCTL is the same as the default.
*/
const WRTBIASCTL_HP_DEFAULT 0x0
/* /*
* Receiver Bias Control * Receiver Bias Control
...@@ -3447,7 +3527,7 @@ scratch_ram { ...@@ -3447,7 +3527,7 @@ scratch_ram {
size 2 size 2
} }
/* /*
* Mode to restore on idle_loop exit. * Mode to restore on legacy idle loop exit.
*/ */
SAVED_MODE { SAVED_MODE {
size 1 size 1
...@@ -3517,6 +3597,13 @@ scratch_ram { ...@@ -3517,6 +3597,13 @@ scratch_ram {
P_MESGIN CDO|IOO|MSGO P_MESGIN CDO|IOO|MSGO
} }
} }
/*
* Value to "or" into the SCBPTR[1] value to
* indicate that an entry in the QINFIFO is valid.
*/
QOUTFIFO_ENTRY_VALID_TAG {
size 1
}
/* /*
* Base address of our shared data with the kernel driver in host * Base address of our shared data with the kernel driver in host
* memory. This includes the qoutfifo and target mode * memory. This includes the qoutfifo and target mode
...@@ -3532,13 +3619,6 @@ scratch_ram { ...@@ -3532,13 +3619,6 @@ scratch_ram {
QOUTFIFO_NEXT_ADDR { QOUTFIFO_NEXT_ADDR {
size 4 size 4
} }
/*
* Value to "or" into the SCBPTR[1] value to
* indicate that an entry in the QINFIFO is valid.
*/
QOUTFIFO_ENTRY_VALID_TAG {
size 1
}
/* /*
* Kernel and sequencer offsets into the queue of * Kernel and sequencer offsets into the queue of
* incoming target mode command descriptors. The * incoming target mode command descriptors. The
...@@ -3722,7 +3802,6 @@ scb { ...@@ -3722,7 +3802,6 @@ scb {
} }
/*********************************** Constants ********************************/ /*********************************** Constants ********************************/
const SEQ_STACK_SIZE 8
const MK_MESSAGE_BIT_OFFSET 4 const MK_MESSAGE_BIT_OFFSET 4
const TID_SHIFT 4 const TID_SHIFT 4
const TARGET_CMD_CMPLT 0xfe const TARGET_CMD_CMPLT 0xfe
...@@ -3746,7 +3825,15 @@ const BUS_32_BIT 0x02 ...@@ -3746,7 +3825,15 @@ const BUS_32_BIT 0x02
/* Offset maximums */ /* Offset maximums */
const MAX_OFFSET 0xfe const MAX_OFFSET 0xfe
const MAX_OFFSET_PACED 0x7f const MAX_OFFSET_PACED 0xfe
const MAX_OFFSET_PACED_BUG 0x7f
/*
* Some 160 devices incorrectly accept 0xfe as a
* sync offset, but will overrun this value. Limit
* to 0x7f for speed lower than U320 which will
* avoid the persistent sync offset overruns.
*/
const MAX_OFFSET_NON_PACED 0x7f
const HOST_MSG 0xff const HOST_MSG 0xff
/* /*
......
This diff is collapsed.
This diff is collapsed.
...@@ -36,7 +36,7 @@ ...@@ -36,7 +36,7 @@
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES. * POSSIBILITY OF SUCH DAMAGES.
* *
* $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_host.h#7 $ * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_host.h#10 $
*/ */
#ifndef _AIC79XX_LINUX_HOST_H_ #ifndef _AIC79XX_LINUX_HOST_H_
...@@ -48,8 +48,14 @@ int ahd_linux_detect(Scsi_Host_Template *); ...@@ -48,8 +48,14 @@ int ahd_linux_detect(Scsi_Host_Template *);
int ahd_linux_release(struct Scsi_Host *); int ahd_linux_release(struct Scsi_Host *);
const char *ahd_linux_info(struct Scsi_Host *); const char *ahd_linux_info(struct Scsi_Host *);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
int ahd_linux_biosparam(Disk *, struct block_device *, int[]); int ahd_linux_slave_alloc(Scsi_Device *);
int ahd_linux_slave_configure(Scsi_Device *);
void ahd_linux_slave_destroy(Scsi_Device *);
int ahd_linux_biosparam(struct scsi_device*, struct block_device*,
sector_t, int[]);
#else #else
void ahd_linux_select_queue_depth(struct Scsi_Host *host,
Scsi_Device *scsi_devs);
int ahd_linux_biosparam(Disk *, kdev_t, int[]); int ahd_linux_biosparam(Disk *, kdev_t, int[]);
#endif #endif
int ahd_linux_bus_reset(Scsi_Cmnd *); int ahd_linux_bus_reset(Scsi_Cmnd *);
...@@ -67,24 +73,14 @@ int ahd_linux_abort(Scsi_Cmnd *); ...@@ -67,24 +73,14 @@ int ahd_linux_abort(Scsi_Cmnd *);
* to do with card config are filled in after the card is detected. * to do with card config are filled in after the card is detected.
*/ */
#define AIC79XX_TEMPLATE_CORE \ #define AIC79XX_TEMPLATE_CORE \
next: NULL, \
module: NULL, \
proc_dir: NULL, \
proc_info: ahd_linux_proc_info, \ proc_info: ahd_linux_proc_info, \
name: NULL, \
detect: ahd_linux_detect, \ detect: ahd_linux_detect, \
release: ahd_linux_release, \ release: ahd_linux_release, \
info: ahd_linux_info, \ info: ahd_linux_info, \
command: NULL, \
queuecommand: ahd_linux_queue, \ queuecommand: ahd_linux_queue, \
eh_strategy_handler: NULL, \
eh_abort_handler: ahd_linux_abort, \ eh_abort_handler: ahd_linux_abort, \
eh_device_reset_handler: ahd_linux_dev_reset, \ eh_device_reset_handler: ahd_linux_dev_reset, \
eh_bus_reset_handler: ahd_linux_bus_reset, \ eh_bus_reset_handler: ahd_linux_bus_reset, \
eh_host_reset_handler: NULL, \
abort: NULL, \
reset: NULL, \
slave_attach: NULL, \
bios_param: AIC79XX_BIOSPARAM, \ bios_param: AIC79XX_BIOSPARAM, \
can_queue: AHD_MAX_QUEUE,/* max simultaneous cmds */\ can_queue: AHD_MAX_QUEUE,/* max simultaneous cmds */\
this_id: -1, /* scsi id of host adapter */\ this_id: -1, /* scsi id of host adapter */\
...@@ -96,11 +92,15 @@ int ahd_linux_abort(Scsi_Cmnd *); ...@@ -96,11 +92,15 @@ int ahd_linux_abort(Scsi_Cmnd *);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
#define AIC79XX { \ #define AIC79XX { \
AIC79XX_TEMPLATE_CORE \ AIC79XX_TEMPLATE_CORE, \
slave_alloc: ahd_linux_slave_alloc, \
slave_configure: ahd_linux_slave_configure, \
slave_destroy: ahd_linux_slave_destroy \
} }
#else #else
#define AIC79XX { \ #define AIC79XX { \
AIC79XX_TEMPLATE_CORE, \ AIC79XX_TEMPLATE_CORE, \
select_queue_depths: ahd_linux_select_queue_depth, \
use_new_eh_code: 1 \ use_new_eh_code: 1 \
} }
#endif #endif
......
...@@ -37,7 +37,7 @@ ...@@ -37,7 +37,7 @@
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES. * POSSIBILITY OF SUCH DAMAGES.
* *
* $Id: //depot/aic7xxx/aic7xxx/aic79xx_inline.h#36 $ * $Id: //depot/aic7xxx/aic7xxx/aic79xx_inline.h#39 $
* *
* $FreeBSD$ * $FreeBSD$
*/ */
...@@ -109,7 +109,7 @@ ahd_set_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst) ...@@ -109,7 +109,7 @@ ahd_set_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
|| ahd->dst_mode == AHD_MODE_UNKNOWN) || ahd->dst_mode == AHD_MODE_UNKNOWN)
panic("Setting mode prior to saving it.\n"); panic("Setting mode prior to saving it.\n");
if ((ahd_debug & AHD_SHOW_MODEPTR) != 0) if ((ahd_debug & AHD_SHOW_MODEPTR) != 0)
printf("Setting mode 0x%x\n", printf("%s: Setting mode 0x%x\n", ahd_name(ahd),
ahd_build_mode_state(ahd, src, dst)); ahd_build_mode_state(ahd, src, dst));
#endif #endif
ahd_outb(ahd, MODE_PTR, ahd_build_mode_state(ahd, src, dst)); ahd_outb(ahd, MODE_PTR, ahd_build_mode_state(ahd, src, dst));
...@@ -265,6 +265,7 @@ static __inline void ...@@ -265,6 +265,7 @@ static __inline void
ahd_setup_scb_common(struct ahd_softc *ahd, struct scb *scb) ahd_setup_scb_common(struct ahd_softc *ahd, struct scb *scb)
{ {
/* XXX Handle target mode SCBs. */ /* XXX Handle target mode SCBs. */
scb->crc_retry_count = 0;
if ((scb->flags & SCB_PACKETIZED) != 0) { if ((scb->flags & SCB_PACKETIZED) != 0) {
/* XXX what about ACA?? It is type 4, but TAG_TYPE == 0x3. */ /* XXX what about ACA?? It is type 4, but TAG_TYPE == 0x3. */
scb->hscb->task_attribute= scb->hscb->control & SCB_TAG_TYPE; scb->hscb->task_attribute= scb->hscb->control & SCB_TAG_TYPE;
...@@ -898,7 +899,19 @@ ahd_intr(struct ahd_softc *ahd) ...@@ -898,7 +899,19 @@ ahd_intr(struct ahd_softc *ahd)
* and after the sequencer has added new entries * and after the sequencer has added new entries
* and asserted the interrupt again. * and asserted the interrupt again.
*/ */
ahd_flush_device_writes(ahd); if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) {
if (ahd_is_paused(ahd)) {
/*
* Potentially lost SEQINT.
* If SEQINTCODE is non-zero,
* simulate the SEQINT.
*/
if (ahd_inb(ahd, SEQINTCODE) != NO_SEQINT)
intstat |= SEQINT;
}
} else {
ahd_flush_device_writes(ahd);
}
ahd_run_qoutfifo(ahd); ahd_run_qoutfifo(ahd);
#ifdef AHD_TARGET_MODE #ifdef AHD_TARGET_MODE
if ((ahd->flags & AHD_TARGETROLE) != 0) if ((ahd->flags & AHD_TARGETROLE) != 0)
......
This diff is collapsed.
...@@ -36,7 +36,7 @@ ...@@ -36,7 +36,7 @@
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES. * POSSIBILITY OF SUCH DAMAGES.
* *
* $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm_pci.c#13 $ * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm_pci.c#17 $
*/ */
#include "aic79xx_osm.h" #include "aic79xx_osm.h"
...@@ -88,7 +88,7 @@ ahd_linux_pci_dev_remove(struct pci_dev *pdev) ...@@ -88,7 +88,7 @@ ahd_linux_pci_dev_remove(struct pci_dev *pdev)
* list for extra sanity. * list for extra sanity.
*/ */
ahd_list_lock(&l); ahd_list_lock(&l);
ahd = ahd_find_softc((struct ahd_softc *)pdev->driver_data); ahd = ahd_find_softc((struct ahd_softc *)pci_get_drvdata(pdev));
if (ahd != NULL) { if (ahd != NULL) {
u_long s; u_long s;
...@@ -179,7 +179,7 @@ ahd_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent) ...@@ -179,7 +179,7 @@ ahd_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
return (-error); return (-error);
} }
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
pdev->driver_data = ahd; pci_set_drvdata(pdev, ahd);
if (aic79xx_detect_complete) if (aic79xx_detect_complete)
ahd_linux_register_host(ahd, aic79xx_driver_template); ahd_linux_register_host(ahd, aic79xx_driver_template);
#endif #endif
...@@ -268,8 +268,7 @@ ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd, ...@@ -268,8 +268,7 @@ ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
if (aic79xx_allow_memio == 0) if (aic79xx_allow_memio == 0)
return (ENOMEM); return (ENOMEM);
if ((ahd->chip & AHD_BUS_MASK) == AHD_PCIX if ((ahd->bugs & AHD_PCIX_MMAPIO_BUG) != 0)
&& (ahd->bugs & AHD_PCIX_MMAPIO_BUG) != 0)
return (ENOMEM); return (ENOMEM);
error = 0; error = 0;
...@@ -330,17 +329,18 @@ ahd_pci_map_registers(struct ahd_softc *ahd) ...@@ -330,17 +329,18 @@ ahd_pci_map_registers(struct ahd_softc *ahd)
ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND, ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND,
command | PCIM_CMD_MEMEN, 4); command | PCIM_CMD_MEMEN, 4);
/* if (ahd_pci_test_register_access(ahd) != 0) {
* Do a quick test to see if memory mapped
* I/O is functioning correctly.
*/
if (ahd_inb(ahd, HCNTRL) == 0xFF) {
printf("aic79xx: PCI Device %d:%d:%d " printf("aic79xx: PCI Device %d:%d:%d "
"failed memory mapped test\n", "failed memory mapped test. Using PIO.\n",
ahd_get_pci_bus(ahd->dev_softc), ahd_get_pci_bus(ahd->dev_softc),
ahd_get_pci_slot(ahd->dev_softc), ahd_get_pci_slot(ahd->dev_softc),
ahd_get_pci_function(ahd->dev_softc)); ahd_get_pci_function(ahd->dev_softc));
iounmap((void *)((u_long)maddr & PAGE_MASK));
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
release_mem_region(ahd->platform_data->mem_busaddr,
0x1000);
#endif
ahd->bshs[0].maddr = NULL; ahd->bshs[0].maddr = NULL;
maddr = NULL; maddr = NULL;
} else } else
......
This diff is collapsed.
...@@ -37,14 +37,13 @@ ...@@ -37,14 +37,13 @@
* String handling code courtesy of Gerard Roudier's <groudier@club-internet.fr> * String handling code courtesy of Gerard Roudier's <groudier@club-internet.fr>
* sym driver. * sym driver.
* *
* $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_proc.c#7 $ * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_proc.c#9 $
*/ */
#include "aic79xx_osm.h" #include "aic79xx_osm.h"
#include "aic79xx_inline.h" #include "aic79xx_inline.h"
static void copy_mem_info(struct info_str *info, char *data, int len); static void copy_mem_info(struct info_str *info, char *data, int len);
static int copy_info(struct info_str *info, char *fmt, ...); static int copy_info(struct info_str *info, char *fmt, ...);
static u_int scsi_calc_syncsrate(u_int period_factor);
static void ahd_dump_target_state(struct ahd_softc *ahd, static void ahd_dump_target_state(struct ahd_softc *ahd,
struct info_str *info, struct info_str *info,
u_int our_id, char channel, u_int our_id, char channel,
...@@ -96,48 +95,6 @@ copy_info(struct info_str *info, char *fmt, ...) ...@@ -96,48 +95,6 @@ copy_info(struct info_str *info, char *fmt, ...)
return (len); return (len);
} }
/*
* Table of syncrates that don't follow the "divisible by 4"
* rule. This table will be expanded in future SCSI specs.
*/
static struct {
u_int period_factor;
u_int period; /* in 100ths of ns */
} scsi_syncrates[] = {
{ 0x08, 625 }, /* FAST-160 */
{ 0x09, 1250 }, /* FAST-80 */
{ 0x0a, 2500 }, /* FAST-40 40MHz */
{ 0x0b, 3030 }, /* FAST-40 33MHz */
{ 0x0c, 5000 } /* FAST-20 */
};
/*
* Return the frequency in kHz corresponding to the given
* sync period factor.
*/
static u_int
scsi_calc_syncsrate(u_int period_factor)
{
int i;
int num_syncrates;
num_syncrates = sizeof(scsi_syncrates) / sizeof(scsi_syncrates[0]);
/* See if the period is in the "exception" table */
for (i = 0; i < num_syncrates; i++) {
if (period_factor == scsi_syncrates[i].period_factor) {
/* Period in kHz */
return (100000000 / scsi_syncrates[i].period);
}
}
/*
* Wasn't in the table, so use the standard
* 4 times conversion.
*/
return (10000000 / (period_factor * 4 * 10));
}
void void
ahd_format_transinfo(struct info_str *info, struct ahd_transinfo *tinfo) ahd_format_transinfo(struct info_str *info, struct ahd_transinfo *tinfo)
{ {
...@@ -145,10 +102,14 @@ ahd_format_transinfo(struct info_str *info, struct ahd_transinfo *tinfo) ...@@ -145,10 +102,14 @@ ahd_format_transinfo(struct info_str *info, struct ahd_transinfo *tinfo)
u_int freq; u_int freq;
u_int mb; u_int mb;
if (tinfo->period == AHD_PERIOD_UNKNOWN) {
copy_info(info, "Renegotiation Pending");
return;
}
speed = 3300; speed = 3300;
freq = 0; freq = 0;
if (tinfo->offset != 0) { if (tinfo->offset != 0) {
freq = scsi_calc_syncsrate(tinfo->period); freq = aic_calc_syncsrate(tinfo->period);
speed = freq; speed = freq;
} }
speed *= (0x01 << tinfo->width); speed *= (0x01 << tinfo->width);
...@@ -159,10 +120,28 @@ ahd_format_transinfo(struct info_str *info, struct ahd_transinfo *tinfo) ...@@ -159,10 +120,28 @@ ahd_format_transinfo(struct info_str *info, struct ahd_transinfo *tinfo)
copy_info(info, "%dKB/s transfers", speed); copy_info(info, "%dKB/s transfers", speed);
if (freq != 0) { if (freq != 0) {
copy_info(info, " (%d.%03dMHz%s, offset %d", int printed_options;
freq / 1000, freq % 1000,
(tinfo->ppr_options & MSG_EXT_PPR_DT_REQ) != 0 printed_options = 0;
? " DT" : "", tinfo->offset); copy_info(info, " (%d.%03dMHz", freq / 1000, freq % 1000);
if ((tinfo->ppr_options & MSG_EXT_PPR_DT_REQ) != 0) {
copy_info(info, " DT");
printed_options++;
}
if ((tinfo->ppr_options & MSG_EXT_PPR_IU_REQ) != 0) {
copy_info(info, "%s", printed_options ? "|IU" : " IU");
printed_options++;
}
if ((tinfo->ppr_options & MSG_EXT_PPR_RTI) != 0) {
copy_info(info, "%s",
printed_options ? "|RTI" : " RTI");
printed_options++;
}
if ((tinfo->ppr_options & MSG_EXT_PPR_QAS_REQ) != 0) {
copy_info(info, "%s",
printed_options ? "|QAS" : " QAS");
printed_options++;
}
} }
if (tinfo->width > 0) { if (tinfo->width > 0) {
......
...@@ -2,8 +2,8 @@ ...@@ -2,8 +2,8 @@
* DO NOT EDIT - This file is automatically generated * DO NOT EDIT - This file is automatically generated
* from the following source files: * from the following source files:
* *
* $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#60 $ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#74 $
* $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#45 $ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#56 $
*/ */
typedef int (ahd_reg_print_t)(u_int, u_int *, u_int); typedef int (ahd_reg_print_t)(u_int, u_int *, u_int);
typedef struct ahd_reg_parse_entry { typedef struct ahd_reg_parse_entry {
...@@ -747,6 +747,13 @@ ahd_reg_print_t ahd_dffsxfrctl_print; ...@@ -747,6 +747,13 @@ ahd_reg_print_t ahd_dffsxfrctl_print;
ahd_print_register(NULL, 0, "DFFSXFRCTL", 0x5a, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "DFFSXFRCTL", 0x5a, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqoscsctl_print;
#else
#define ahd_lqoscsctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQOSCSCTL", 0x5a, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_nextscb_print; ahd_reg_print_t ahd_nextscb_print;
#else #else
...@@ -999,6 +1006,13 @@ ahd_reg_print_t ahd_haddr_print; ...@@ -999,6 +1006,13 @@ ahd_reg_print_t ahd_haddr_print;
ahd_print_register(NULL, 0, "HADDR", 0x70, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "HADDR", 0x70, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_plldelay_print;
#else
#define ahd_plldelay_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "PLLDELAY", 0x70, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_hodmaadr_print; ahd_reg_print_t ahd_hodmaadr_print;
#else #else
...@@ -1437,7 +1451,7 @@ ahd_reg_print_t ahd_msipcistat_print; ...@@ -1437,7 +1451,7 @@ ahd_reg_print_t ahd_msipcistat_print;
ahd_reg_print_t ahd_targpcistat_print; ahd_reg_print_t ahd_targpcistat_print;
#else #else
#define ahd_targpcistat_print(regvalue, cur_col, wrap) \ #define ahd_targpcistat_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "TARGPCISTAT", 0xa6, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "TARGPCISTAT", 0xa7, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
...@@ -2043,24 +2057,24 @@ ahd_reg_print_t ahd_lastphase_print; ...@@ -2043,24 +2057,24 @@ ahd_reg_print_t ahd_lastphase_print;
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_shared_data_addr_print; ahd_reg_print_t ahd_qoutfifo_entry_valid_tag_print;
#else #else
#define ahd_shared_data_addr_print(regvalue, cur_col, wrap) \ #define ahd_qoutfifo_entry_valid_tag_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SHARED_DATA_ADDR", 0x137, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG", 0x137, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_qoutfifo_next_addr_print; ahd_reg_print_t ahd_shared_data_addr_print;
#else #else
#define ahd_qoutfifo_next_addr_print(regvalue, cur_col, wrap) \ #define ahd_shared_data_addr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR", 0x13b, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SHARED_DATA_ADDR", 0x138, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_qoutfifo_entry_valid_tag_print; ahd_reg_print_t ahd_qoutfifo_next_addr_print;
#else #else
#define ahd_qoutfifo_entry_valid_tag_print(regvalue, cur_col, wrap) \ #define ahd_qoutfifo_next_addr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG", 0x13f, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR", 0x13c, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
...@@ -2311,6 +2325,11 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2311,6 +2325,11 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SPLTINT 0x01 #define SPLTINT 0x01
#define SEQINTCODE 0x02 #define SEQINTCODE 0x02
#define SAW_HWERR 0x17
#define TRACEPOINT3 0x16
#define TRACEPOINT2 0x15
#define TRACEPOINT1 0x14
#define TRACEPOINT0 0x13
#define ENTERING_NONPACK 0x12 #define ENTERING_NONPACK 0x12
#define CFG4OVERRUN 0x11 #define CFG4OVERRUN 0x11
#define STATUS_OVERRUN 0x10 #define STATUS_OVERRUN 0x10
...@@ -2329,11 +2348,13 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2329,11 +2348,13 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define PROTO_VIOLATION 0x03 #define PROTO_VIOLATION 0x03
#define SEND_REJECT 0x02 #define SEND_REJECT 0x02
#define BAD_PHASE 0x01 #define BAD_PHASE 0x01
#define NO_SEQINT 0x00
#define CLRINT 0x03 #define CLRINT 0x03
#define CLRHWERRINT 0x80 #define CLRHWERRINT 0x80
#define CLRBRKADRINT 0x40 #define CLRBRKADRINT 0x40
#define CLRSWTMINT 0x20 #define CLRSWTMINT 0x20
#define CLRPCIINT 0x10
#define CLRSCSIINT 0x08 #define CLRSCSIINT 0x08
#define CLRSEQINT 0x04 #define CLRSEQINT 0x04
#define CLRCMDINT 0x02 #define CLRCMDINT 0x02
...@@ -2418,6 +2439,7 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2418,6 +2439,7 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SPLTINTEN 0x01 #define SPLTINTEN 0x01
#define DFCNTRL 0x19 #define DFCNTRL 0x19
#define SCSIENWRDIS 0x40
#define SCSIENACK 0x20 #define SCSIENACK 0x20
#define DIRECTIONACK 0x04 #define DIRECTIONACK 0x04
#define FIFOFLUSHACK 0x02 #define FIFOFLUSHACK 0x02
...@@ -2572,9 +2594,12 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2572,9 +2594,12 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define ASU 0x07 #define ASU 0x07
#define DFFSTAT 0x3f #define DFFSTAT 0x3f
#define CURRFIFO 0x03
#define FIFO1FREE 0x20 #define FIFO1FREE 0x20
#define FIFO0FREE 0x10 #define FIFO0FREE 0x10
#define CURRFIFO 0x01 #define CURRFIFO_NONE 0x03
#define CURRFIFO_1 0x01
#define CURRFIFO_0 0x00
#define SCSISIGO 0x40 #define SCSISIGO 0x40
#define CDO 0x80 #define CDO 0x80
...@@ -2859,10 +2884,15 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2859,10 +2884,15 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define GSFIFO 0x58 #define GSFIFO 0x58
#define DFFSXFRCTL 0x5a #define DFFSXFRCTL 0x5a
#define DFFBITBUCKET 0x08
#define CLRSHCNT 0x04 #define CLRSHCNT 0x04
#define CLRCHN 0x02 #define CLRCHN 0x02
#define RSTCHN 0x01 #define RSTCHN 0x01
#define LQOSCSCTL 0x5a
#define LQOH2A_VERSION 0x80
#define LQONOCHKOVER 0x01
#define NEXTSCB 0x5a #define NEXTSCB 0x5a
#define CLRSEQINTSRC 0x5b #define CLRSEQINTSRC 0x5b
...@@ -2938,7 +2968,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2938,7 +2968,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define PPROPT_IUT 0x01 #define PPROPT_IUT 0x01
#define NEGCONOPTS 0x64 #define NEGCONOPTS 0x64
#define ENAIP 0x08 #define ENSNAPSHOT 0x40
#define RTI_WRTDIS 0x20
#define RTI_OVRDTRN 0x10
#define ENSLOWCRC 0x08
#define ENAUTOATNI 0x04 #define ENAUTOATNI 0x04
#define ENAUTOATNO 0x02 #define ENAUTOATNO 0x02
#define WIDEXFER 0x01 #define WIDEXFER 0x01
...@@ -2947,7 +2980,7 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2947,7 +2980,7 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SCSCHKN 0x66 #define SCSCHKN 0x66
#define STSELSKIDDIS 0x40 #define STSELSKIDDIS 0x40
#define CURFIFODEF 0x20 #define CURRFIFODEF 0x20
#define WIDERESEN 0x10 #define WIDERESEN 0x10
#define SDONEMSKDIS 0x08 #define SDONEMSKDIS 0x08
#define DFFACTCLR 0x04 #define DFFACTCLR 0x04
...@@ -2994,6 +3027,9 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2994,6 +3027,9 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define HADDR 0x70 #define HADDR 0x70
#define PLLDELAY 0x70
#define SPLIT_DROP_REQ 0x80
#define HODMAADR 0x70 #define HODMAADR 0x70
#define HODMACNT 0x78 #define HODMACNT 0x78
...@@ -3194,7 +3230,7 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -3194,7 +3230,7 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CLRPENDMSI 0x08 #define CLRPENDMSI 0x08
#define DPR 0x01 #define DPR 0x01
#define TARGPCISTAT 0xa6 #define TARGPCISTAT 0xa7
#define DPE 0x80 #define DPE 0x80
#define SSE 0x40 #define SSE 0x40
#define STA 0x08 #define STA 0x08
...@@ -3226,9 +3262,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -3226,9 +3262,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CMC_BUFFER_BIST_EN 0x01 #define CMC_BUFFER_BIST_EN 0x01
#define CCSGCTL 0xad #define CCSGCTL 0xad
#define CCSGEN 0x0c
#define CCSGDONE 0x80 #define CCSGDONE 0x80
#define SG_CACHE_AVAIL 0x10 #define SG_CACHE_AVAIL 0x10
#define CCSGEN 0x08 #define CCSGENACK 0x08
#define SG_FETCH_REQ 0x02 #define SG_FETCH_REQ 0x02
#define CCSGRESET 0x01 #define CCSGRESET 0x01
...@@ -3495,11 +3532,11 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -3495,11 +3532,11 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define P_DATAOUT_DT 0x20 #define P_DATAOUT_DT 0x20
#define P_DATAOUT 0x00 #define P_DATAOUT 0x00
#define SHARED_DATA_ADDR 0x137 #define QOUTFIFO_ENTRY_VALID_TAG 0x137
#define QOUTFIFO_NEXT_ADDR 0x13b #define SHARED_DATA_ADDR 0x138
#define QOUTFIFO_ENTRY_VALID_TAG 0x13f #define QOUTFIFO_NEXT_ADDR 0x13c
#define KERNEL_TQINPOS 0x140 #define KERNEL_TQINPOS 0x140
...@@ -3612,19 +3649,28 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -3612,19 +3649,28 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SCB_TRANSFER_SIZE_FULL_LUN 0x38 #define SCB_TRANSFER_SIZE_FULL_LUN 0x38
#define STATUS_QUEUE_FULL 0x28 #define STATUS_QUEUE_FULL 0x28
#define STATUS_BUSY 0x08 #define STATUS_BUSY 0x08
#define MAX_OFFSET_PACED 0x7f #define MAX_OFFSET_NON_PACED 0x7f
#define MAX_OFFSET_PACED 0xfe
#define BUS_32_BIT 0x02 #define BUS_32_BIT 0x02
#define CCSGADDR_MAX 0x80 #define CCSGADDR_MAX 0x80
#define TID_SHIFT 0x04 #define TID_SHIFT 0x04
#define MK_MESSAGE_BIT_OFFSET 0x04 #define MK_MESSAGE_BIT_OFFSET 0x04
#define WRTBIASCTL_HP_DEFAULT 0x00
#define SEEOP_EWDS_ADDR 0x00 #define SEEOP_EWDS_ADDR 0x00
#define AHD_NUM_ANNEXCOLS 0x04 #define AHD_AMPLITUDE_SHIFT 0x00
#define AHD_PRECOMP_FASTSLEW 0x40 #define AHD_AMPLITUDE_MASK 0x07
#define AHD_ANNEXCOL_AMPLITUDE 0x06
#define AHD_SLEWRATE_DEF_REVA 0x01
#define AHD_SLEWRATE_SHIFT 0x03
#define AHD_SLEWRATE_MASK 0x78
#define AHD_PRECOMP_CUTBACK_29 0x06 #define AHD_PRECOMP_CUTBACK_29 0x06
#define AHD_NUM_PER_DEV_ANNEXCOLS 0x04
#define B_CURRFIFO_0 0x02
#define NVRAM_SCB_OFFSET 0x2c #define NVRAM_SCB_OFFSET 0x2c
#define STATUS_PKT_SENSE 0xff #define STATUS_PKT_SENSE 0xff
#define CMD_GROUP_CODE_SHIFT 0x05 #define CMD_GROUP_CODE_SHIFT 0x05
#define AHD_SENSE_BUFSIZE 0x100 #define AHD_SENSE_BUFSIZE 0x100
#define MAX_OFFSET_PACED_BUG 0x7f
#define BUS_8_BIT 0x00 #define BUS_8_BIT 0x00
#define STIMESEL_BUG_ADJ 0x08 #define STIMESEL_BUG_ADJ 0x08
#define STIMESEL_MIN 0x18 #define STIMESEL_MIN 0x18
...@@ -3634,10 +3680,13 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -3634,10 +3680,13 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define TARGET_CMD_CMPLT 0xfe #define TARGET_CMD_CMPLT 0xfe
#define SEEOP_WRAL_ADDR 0x40 #define SEEOP_WRAL_ADDR 0x40
#define SEEOP_ERAL_ADDR 0x80 #define SEEOP_ERAL_ADDR 0x80
#define AHD_AMPLITUDE_DEF 0x07
#define AHD_SLEWRATE_DEF_REVB 0x08
#define AHD_PRECOMP_CUTBACK_37 0x07 #define AHD_PRECOMP_CUTBACK_37 0x07
#define AHD_PRECOMP_CUTBACK_17 0x04 #define AHD_PRECOMP_CUTBACK_17 0x04
#define AHD_PRECOMP_SHIFT 0x00
#define AHD_PRECOMP_MASK 0x07 #define AHD_PRECOMP_MASK 0x07
#define AHD_ANNEXCOL_PRECOMP 0x04 #define AHD_ANNEXCOL_PRECOMP_SLEW 0x04
#define SRC_MODE_SHIFT 0x00 #define SRC_MODE_SHIFT 0x00
#define PKT_OVERRUN_BUFSIZE 0x200 #define PKT_OVERRUN_BUFSIZE 0x200
#define SCB_TRANSFER_SIZE_1BYTE_LUN 0x30 #define SCB_TRANSFER_SIZE_1BYTE_LUN 0x30
...@@ -3646,10 +3695,9 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -3646,10 +3695,9 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define MAX_OFFSET 0xfe #define MAX_OFFSET 0xfe
#define BUS_16_BIT 0x01 #define BUS_16_BIT 0x01
#define CCSCBADDR_MAX 0x80 #define CCSCBADDR_MAX 0x80
#define SEQ_STACK_SIZE 0x08
#define WRTBIASCTL_CPQ_DEFAULT 0x97
#define NUMDSPS 0x14 #define NUMDSPS 0x14
#define SEEOP_EWEN_ADDR 0xc0 #define SEEOP_EWEN_ADDR 0xc0
#define AHD_ANNEXCOL_PER_DEV0 0x04
#define DST_MODE_SHIFT 0x04 #define DST_MODE_SHIFT 0x04
...@@ -3665,4 +3713,4 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -3665,4 +3713,4 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
/* Exported Labels */ /* Exported Labels */
#define LABEL_seq_isr 0x21c #define LABEL_seq_isr 0x23b
...@@ -2,8 +2,8 @@ ...@@ -2,8 +2,8 @@
* DO NOT EDIT - This file is automatically generated * DO NOT EDIT - This file is automatically generated
* from the following source files: * from the following source files:
* *
* $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#60 $ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#74 $
* $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#45 $ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#56 $
*/ */
#include "aic79xx_osm.h" #include "aic79xx_osm.h"
...@@ -40,6 +40,7 @@ ahd_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap) ...@@ -40,6 +40,7 @@ ahd_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
} }
static ahd_reg_parse_entry_t SEQINTCODE_parse_table[] = { static ahd_reg_parse_entry_t SEQINTCODE_parse_table[] = {
{ "NO_SEQINT", 0x00, 0xff },
{ "BAD_PHASE", 0x01, 0xff }, { "BAD_PHASE", 0x01, 0xff },
{ "SEND_REJECT", 0x02, 0xff }, { "SEND_REJECT", 0x02, 0xff },
{ "PROTO_VIOLATION", 0x03, 0xff }, { "PROTO_VIOLATION", 0x03, 0xff },
...@@ -57,13 +58,18 @@ static ahd_reg_parse_entry_t SEQINTCODE_parse_table[] = { ...@@ -57,13 +58,18 @@ static ahd_reg_parse_entry_t SEQINTCODE_parse_table[] = {
{ "CFG4ISTAT_INTR", 0x0f, 0xff }, { "CFG4ISTAT_INTR", 0x0f, 0xff },
{ "STATUS_OVERRUN", 0x10, 0xff }, { "STATUS_OVERRUN", 0x10, 0xff },
{ "CFG4OVERRUN", 0x11, 0xff }, { "CFG4OVERRUN", 0x11, 0xff },
{ "ENTERING_NONPACK", 0x12, 0xff } { "ENTERING_NONPACK", 0x12, 0xff },
{ "TRACEPOINT0", 0x13, 0xff },
{ "TRACEPOINT1", 0x14, 0xff },
{ "TRACEPOINT2", 0x15, 0xff },
{ "TRACEPOINT3", 0x16, 0xff },
{ "SAW_HWERR", 0x17, 0xff }
}; };
int int
ahd_seqintcode_print(u_int regvalue, u_int *cur_col, u_int wrap) ahd_seqintcode_print(u_int regvalue, u_int *cur_col, u_int wrap)
{ {
return (ahd_print_register(SEQINTCODE_parse_table, 18, "SEQINTCODE", return (ahd_print_register(SEQINTCODE_parse_table, 24, "SEQINTCODE",
0x02, regvalue, cur_col, wrap)); 0x02, regvalue, cur_col, wrap));
} }
...@@ -72,6 +78,7 @@ static ahd_reg_parse_entry_t CLRINT_parse_table[] = { ...@@ -72,6 +78,7 @@ static ahd_reg_parse_entry_t CLRINT_parse_table[] = {
{ "CLRCMDINT", 0x02, 0x02 }, { "CLRCMDINT", 0x02, 0x02 },
{ "CLRSEQINT", 0x04, 0x04 }, { "CLRSEQINT", 0x04, 0x04 },
{ "CLRSCSIINT", 0x08, 0x08 }, { "CLRSCSIINT", 0x08, 0x08 },
{ "CLRPCIINT", 0x10, 0x10 },
{ "CLRSWTMINT", 0x20, 0x20 }, { "CLRSWTMINT", 0x20, 0x20 },
{ "CLRBRKADRINT", 0x40, 0x40 }, { "CLRBRKADRINT", 0x40, 0x40 },
{ "CLRHWERRINT", 0x80, 0x80 } { "CLRHWERRINT", 0x80, 0x80 }
...@@ -80,7 +87,7 @@ static ahd_reg_parse_entry_t CLRINT_parse_table[] = { ...@@ -80,7 +87,7 @@ static ahd_reg_parse_entry_t CLRINT_parse_table[] = {
int int
ahd_clrint_print(u_int regvalue, u_int *cur_col, u_int wrap) ahd_clrint_print(u_int regvalue, u_int *cur_col, u_int wrap)
{ {
return (ahd_print_register(CLRINT_parse_table, 7, "CLRINT", return (ahd_print_register(CLRINT_parse_table, 8, "CLRINT",
0x03, regvalue, cur_col, wrap)); 0x03, regvalue, cur_col, wrap));
} }
...@@ -253,13 +260,14 @@ static ahd_reg_parse_entry_t DFCNTRL_parse_table[] = { ...@@ -253,13 +260,14 @@ static ahd_reg_parse_entry_t DFCNTRL_parse_table[] = {
{ "HDMAENACK", 0x08, 0x08 }, { "HDMAENACK", 0x08, 0x08 },
{ "SCSIEN", 0x20, 0x20 }, { "SCSIEN", 0x20, 0x20 },
{ "SCSIENACK", 0x20, 0x20 }, { "SCSIENACK", 0x20, 0x20 },
{ "SCSIENWRDIS", 0x40, 0x40 },
{ "PRELOADEN", 0x80, 0x80 } { "PRELOADEN", 0x80, 0x80 }
}; };
int int
ahd_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap) ahd_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
{ {
return (ahd_print_register(DFCNTRL_parse_table, 10, "DFCNTRL", return (ahd_print_register(DFCNTRL_parse_table, 11, "DFCNTRL",
0x19, regvalue, cur_col, wrap)); 0x19, regvalue, cur_col, wrap));
} }
...@@ -682,15 +690,18 @@ ahd_sxfrctl2_print(u_int regvalue, u_int *cur_col, u_int wrap) ...@@ -682,15 +690,18 @@ ahd_sxfrctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
} }
static ahd_reg_parse_entry_t DFFSTAT_parse_table[] = { static ahd_reg_parse_entry_t DFFSTAT_parse_table[] = {
{ "CURRFIFO", 0x01, 0x01 }, { "CURRFIFO_0", 0x00, 0x03 },
{ "CURRFIFO_1", 0x01, 0x03 },
{ "CURRFIFO_NONE", 0x03, 0x03 },
{ "FIFO0FREE", 0x10, 0x10 }, { "FIFO0FREE", 0x10, 0x10 },
{ "FIFO1FREE", 0x20, 0x20 } { "FIFO1FREE", 0x20, 0x20 },
{ "CURRFIFO", 0x03, 0x03 }
}; };
int int
ahd_dffstat_print(u_int regvalue, u_int *cur_col, u_int wrap) ahd_dffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
{ {
return (ahd_print_register(DFFSTAT_parse_table, 3, "DFFSTAT", return (ahd_print_register(DFFSTAT_parse_table, 6, "DFFSTAT",
0x3f, regvalue, cur_col, wrap)); 0x3f, regvalue, cur_col, wrap));
} }
...@@ -1317,13 +1328,26 @@ ahd_gsfifo_print(u_int regvalue, u_int *cur_col, u_int wrap) ...@@ -1317,13 +1328,26 @@ ahd_gsfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
static ahd_reg_parse_entry_t DFFSXFRCTL_parse_table[] = { static ahd_reg_parse_entry_t DFFSXFRCTL_parse_table[] = {
{ "RSTCHN", 0x01, 0x01 }, { "RSTCHN", 0x01, 0x01 },
{ "CLRCHN", 0x02, 0x02 }, { "CLRCHN", 0x02, 0x02 },
{ "CLRSHCNT", 0x04, 0x04 } { "CLRSHCNT", 0x04, 0x04 },
{ "DFFBITBUCKET", 0x08, 0x08 }
}; };
int int
ahd_dffsxfrctl_print(u_int regvalue, u_int *cur_col, u_int wrap) ahd_dffsxfrctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
{ {
return (ahd_print_register(DFFSXFRCTL_parse_table, 3, "DFFSXFRCTL", return (ahd_print_register(DFFSXFRCTL_parse_table, 4, "DFFSXFRCTL",
0x5a, regvalue, cur_col, wrap));
}
static ahd_reg_parse_entry_t LQOSCSCTL_parse_table[] = {
{ "LQONOCHKOVER", 0x01, 0x01 },
{ "LQOH2A_VERSION", 0x80, 0x80 }
};
int
ahd_lqoscsctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(LQOSCSCTL_parse_table, 2, "LQOSCSCTL",
0x5a, regvalue, cur_col, wrap)); 0x5a, regvalue, cur_col, wrap));
} }
...@@ -1519,13 +1543,16 @@ static ahd_reg_parse_entry_t NEGCONOPTS_parse_table[] = { ...@@ -1519,13 +1543,16 @@ static ahd_reg_parse_entry_t NEGCONOPTS_parse_table[] = {
{ "WIDEXFER", 0x01, 0x01 }, { "WIDEXFER", 0x01, 0x01 },
{ "ENAUTOATNO", 0x02, 0x02 }, { "ENAUTOATNO", 0x02, 0x02 },
{ "ENAUTOATNI", 0x04, 0x04 }, { "ENAUTOATNI", 0x04, 0x04 },
{ "ENAIP", 0x08, 0x08 } { "ENSLOWCRC", 0x08, 0x08 },
{ "RTI_OVRDTRN", 0x10, 0x10 },
{ "RTI_WRTDIS", 0x20, 0x20 },
{ "ENSNAPSHOT", 0x40, 0x40 }
}; };
int int
ahd_negconopts_print(u_int regvalue, u_int *cur_col, u_int wrap) ahd_negconopts_print(u_int regvalue, u_int *cur_col, u_int wrap)
{ {
return (ahd_print_register(NEGCONOPTS_parse_table, 4, "NEGCONOPTS", return (ahd_print_register(NEGCONOPTS_parse_table, 7, "NEGCONOPTS",
0x64, regvalue, cur_col, wrap)); 0x64, regvalue, cur_col, wrap));
} }
...@@ -1542,7 +1569,7 @@ static ahd_reg_parse_entry_t SCSCHKN_parse_table[] = { ...@@ -1542,7 +1569,7 @@ static ahd_reg_parse_entry_t SCSCHKN_parse_table[] = {
{ "DFFACTCLR", 0x04, 0x04 }, { "DFFACTCLR", 0x04, 0x04 },
{ "SDONEMSKDIS", 0x08, 0x08 }, { "SDONEMSKDIS", 0x08, 0x08 },
{ "WIDERESEN", 0x10, 0x10 }, { "WIDERESEN", 0x10, 0x10 },
{ "CURFIFODEF", 0x20, 0x20 }, { "CURRFIFODEF", 0x20, 0x20 },
{ "STSELSKIDDIS", 0x40, 0x40 } { "STSELSKIDDIS", 0x40, 0x40 }
}; };
...@@ -1690,6 +1717,17 @@ ahd_haddr_print(u_int regvalue, u_int *cur_col, u_int wrap) ...@@ -1690,6 +1717,17 @@ ahd_haddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x70, regvalue, cur_col, wrap)); 0x70, regvalue, cur_col, wrap));
} }
static ahd_reg_parse_entry_t PLLDELAY_parse_table[] = {
{ "SPLIT_DROP_REQ", 0x80, 0x80 }
};
int
ahd_plldelay_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(PLLDELAY_parse_table, 1, "PLLDELAY",
0x70, regvalue, cur_col, wrap));
}
int int
ahd_hodmaadr_print(u_int regvalue, u_int *cur_col, u_int wrap) ahd_hodmaadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{ {
...@@ -2423,7 +2461,7 @@ int ...@@ -2423,7 +2461,7 @@ int
ahd_targpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap) ahd_targpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
{ {
return (ahd_print_register(TARGPCISTAT_parse_table, 4, "TARGPCISTAT", return (ahd_print_register(TARGPCISTAT_parse_table, 4, "TARGPCISTAT",
0xa6, regvalue, cur_col, wrap)); 0xa7, regvalue, cur_col, wrap));
} }
int int
...@@ -2500,15 +2538,16 @@ ahd_cmc_rambist_print(u_int regvalue, u_int *cur_col, u_int wrap) ...@@ -2500,15 +2538,16 @@ ahd_cmc_rambist_print(u_int regvalue, u_int *cur_col, u_int wrap)
static ahd_reg_parse_entry_t CCSGCTL_parse_table[] = { static ahd_reg_parse_entry_t CCSGCTL_parse_table[] = {
{ "CCSGRESET", 0x01, 0x01 }, { "CCSGRESET", 0x01, 0x01 },
{ "SG_FETCH_REQ", 0x02, 0x02 }, { "SG_FETCH_REQ", 0x02, 0x02 },
{ "CCSGEN", 0x08, 0x08 }, { "CCSGENACK", 0x08, 0x08 },
{ "SG_CACHE_AVAIL", 0x10, 0x10 }, { "SG_CACHE_AVAIL", 0x10, 0x10 },
{ "CCSGDONE", 0x80, 0x80 } { "CCSGDONE", 0x80, 0x80 },
{ "CCSGEN", 0x0c, 0x0c }
}; };
int int
ahd_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap) ahd_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
{ {
return (ahd_print_register(CCSGCTL_parse_table, 5, "CCSGCTL", return (ahd_print_register(CCSGCTL_parse_table, 6, "CCSGCTL",
0xad, regvalue, cur_col, wrap)); 0xad, regvalue, cur_col, wrap));
} }
...@@ -3229,24 +3268,24 @@ ahd_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap) ...@@ -3229,24 +3268,24 @@ ahd_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
} }
int int
ahd_shared_data_addr_print(u_int regvalue, u_int *cur_col, u_int wrap) ahd_qoutfifo_entry_valid_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
{ {
return (ahd_print_register(NULL, 0, "SHARED_DATA_ADDR", return (ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG",
0x137, regvalue, cur_col, wrap)); 0x137, regvalue, cur_col, wrap));
} }
int int
ahd_qoutfifo_next_addr_print(u_int regvalue, u_int *cur_col, u_int wrap) ahd_shared_data_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{ {
return (ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR", return (ahd_print_register(NULL, 0, "SHARED_DATA_ADDR",
0x13b, regvalue, cur_col, wrap)); 0x138, regvalue, cur_col, wrap));
} }
int int
ahd_qoutfifo_entry_valid_tag_print(u_int regvalue, u_int *cur_col, u_int wrap) ahd_qoutfifo_next_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{ {
return (ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG", return (ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR",
0x13f, regvalue, cur_col, wrap)); 0x13c, regvalue, cur_col, wrap));
} }
int int
......
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...@@ -39,7 +39,7 @@ ...@@ -39,7 +39,7 @@
* *
* $FreeBSD$ * $FreeBSD$
*/ */
VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#34 $" VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#36 $"
/* /*
* This file is processed by the aic7xxx_asm utility for use in assembling * This file is processed by the aic7xxx_asm utility for use in assembling
...@@ -804,7 +804,7 @@ register INTSTAT { ...@@ -804,7 +804,7 @@ register INTSTAT {
field SEQINT 0x01 field SEQINT 0x01
mask BAD_PHASE SEQINT /* unknown scsi bus phase */ mask BAD_PHASE SEQINT /* unknown scsi bus phase */
mask SEND_REJECT 0x10|SEQINT /* sending a message reject */ mask SEND_REJECT 0x10|SEQINT /* sending a message reject */
mask NO_IDENT 0x20|SEQINT /* no IDENTIFY after reconnect*/ mask PROTO_VIOLATION 0x20|SEQINT /* SCSI protocol violation */
mask NO_MATCH 0x30|SEQINT /* no cmd match for reconnect */ mask NO_MATCH 0x30|SEQINT /* no cmd match for reconnect */
mask IGN_WIDE_RES 0x40|SEQINT /* Complex IGN Wide Res Msg */ mask IGN_WIDE_RES 0x40|SEQINT /* Complex IGN Wide Res Msg */
mask PDATA_REINIT 0x50|SEQINT /* mask PDATA_REINIT 0x50|SEQINT /*
...@@ -1062,6 +1062,7 @@ scb { ...@@ -1062,6 +1062,7 @@ scb {
SCB_CONTROL { SCB_CONTROL {
size 1 size 1
field TARGET_SCB 0x80 field TARGET_SCB 0x80
field STATUS_RCVD 0x80
field DISCENB 0x40 field DISCENB 0x40
field TAG_ENB 0x20 field TAG_ENB 0x20
field MK_MESSAGE 0x10 field MK_MESSAGE 0x10
...@@ -1335,7 +1336,8 @@ scratch_ram { ...@@ -1335,7 +1336,8 @@ scratch_ram {
} }
SEQ_FLAGS { SEQ_FLAGS {
size 1 size 1
field IDENTIFY_SEEN 0x80 field NOT_IDENTIFIED 0x80
field NO_CDB_SENT 0x40
field TARGET_CMD_IS_TAGGED 0x40 field TARGET_CMD_IS_TAGGED 0x40
field DPHASE 0x20 field DPHASE 0x20
/* Target flags */ /* Target flags */
...@@ -1576,6 +1578,7 @@ const BUS_32_BIT 0x02 ...@@ -1576,6 +1578,7 @@ const BUS_32_BIT 0x02
const MAX_OFFSET_8BIT 0x0f const MAX_OFFSET_8BIT 0x0f
const MAX_OFFSET_16BIT 0x08 const MAX_OFFSET_16BIT 0x08
const MAX_OFFSET_ULTRA2 0x7f const MAX_OFFSET_ULTRA2 0x7f
const MAX_OFFSET 0xff
const HOST_MSG 0xff const HOST_MSG 0xff
/* Target mode command processing constants */ /* Target mode command processing constants */
......
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...@@ -5,14 +5,12 @@ PROG= aicasm ...@@ -5,14 +5,12 @@ PROG= aicasm
CSRCS= aicasm.c aicasm_symbol.c CSRCS= aicasm.c aicasm_symbol.c
YSRCS= aicasm_gram.y aicasm_macro_gram.y YSRCS= aicasm_gram.y aicasm_macro_gram.y
LSRCS= aicasm_scan.l aicasm_macro_scan.l LSRCS= aicasm_scan.l aicasm_macro_scan.l
GENHDRS= aicdb.h $(YSRCS:.y=.h) GENHDRS= aicdb.h $(YSRCS:.y=.h)
GENSRCS= $(YSRCS:.y=.c) $(LSRCS:.l=.c) GENSRCS= $(YSRCS:.y=.c) $(LSRCS:.l=.c)
SRCS= ${CSRCS} ${GENSRCS} SRCS= ${CSRCS} ${GENSRCS}
CLEANFILES= ${GENSRCS} ${GENHDRS} $(YSRCS:.y=.output)
# Cleaned up by make clean in kernel build
clean-files := ${GENSRCS} ${GENHDRS} $(YSRCS:.y=.output) $(PROG)
# Override default kernel CFLAGS. This is a userland app. # Override default kernel CFLAGS. This is a userland app.
AICASM_CFLAGS:= -I/usr/include -I. -ldb AICASM_CFLAGS:= -I/usr/include -I. -ldb
YFLAGS= -d YFLAGS= -d
...@@ -47,6 +45,9 @@ aicdb.h: ...@@ -47,6 +45,9 @@ aicdb.h:
echo "*** Install db development libraries"; \ echo "*** Install db development libraries"; \
fi fi
clean:
rm -f $(CLEANFILES) $(PROG)
aicasm_gram.c aicasm_gram.h: aicasm_gram.y aicasm_gram.c aicasm_gram.h: aicasm_gram.y
$(YACC) $(YFLAGS) -b $(<:.y=) $< $(YACC) $(YFLAGS) -b $(<:.y=) $<
mv $(<:.y=).tab.c $(<:.y=.c) mv $(<:.y=).tab.c $(<:.y=.c)
......
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