Commit 04b8637b authored by Will Deacon's avatar Will Deacon

arm64: alternatives: ensure secondary CPUs execute ISB after patching

In order to guarantee that the patched instruction stream is visible to
a CPU, that CPU must execute an isb instruction after any related cache
maintenance has completed.

The instruction patching routines in kernel/insn.c get this right for
things like jump labels and ftrace, but the alternatives patching omits
it entirely leaving secondary cores in a potential limbo between the old
and the new code.

This patch adds an isb following the secondary polling loop in the
altenatives patching.
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 7f08a414
...@@ -132,6 +132,7 @@ static int __apply_alternatives_multi_stop(void *unused) ...@@ -132,6 +132,7 @@ static int __apply_alternatives_multi_stop(void *unused)
if (smp_processor_id()) { if (smp_processor_id()) {
while (!READ_ONCE(patched)) while (!READ_ONCE(patched))
cpu_relax(); cpu_relax();
isb();
} else { } else {
BUG_ON(patched); BUG_ON(patched);
__apply_alternatives(&region); __apply_alternatives(&region);
......
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