Commit 07f0a148 authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://drm.bkbits.net/drm-2.6

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents 8feceb00 930e06f4
...@@ -76,7 +76,7 @@ config DRM_SIS ...@@ -76,7 +76,7 @@ config DRM_SIS
tristate "SiS video cards" tristate "SiS video cards"
depends on DRM && AGP depends on DRM && AGP
help help
Choose this option if you have a SiS 630 or compatibel video Choose this option if you have a SiS 630 or compatible video
chipset. If M is selected the module will be called sis. AGP chipset. If M is selected the module will be called sis. AGP
support is required for this driver to work. support is required for this driver to work.
...@@ -141,7 +141,7 @@ do { \ ...@@ -141,7 +141,7 @@ do { \
radeon_do_cleanup_pageflip( dev ); \ radeon_do_cleanup_pageflip( dev ); \
} \ } \
radeon_mem_release( filp, dev_priv->gart_heap ); \ radeon_mem_release( filp, dev_priv->gart_heap ); \
radeon_mem_release( filp, dev_priv->fb_heap ); \ radeon_mem_release( filp, dev_priv->fb_heap ); \
} \ } \
} while (0) } while (0)
......
...@@ -563,7 +563,7 @@ static struct { ...@@ -563,7 +563,7 @@ static struct {
{ R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5" }, { R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5" },
{ RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0" }, { RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0" },
{ RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1" }, { RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1" },
{ RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_1" }, { RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_2" },
{ R200_RB3D_BLENDCOLOR, 3, "R200_RB3D_BLENDCOLOR" }, { R200_RB3D_BLENDCOLOR, 3, "R200_RB3D_BLENDCOLOR" },
}; };
......
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