Commit 0c2c8852 authored by Stanislaw Gruszka's avatar Stanislaw Gruszka

iwlegacy: s/index/idx/

Signed-off-by: default avatarStanislaw Gruszka <sgruszka@redhat.com>
parent 2d09b062
......@@ -81,7 +81,7 @@
/*
* Mapping of a Tx power level, at factory calibration temperature,
* to a radio/DSP gain table index.
* to a radio/DSP gain table idx.
* One for each of 5 "sample" power levels in each band.
* v_det is measured at the factory, using the 3945's built-in power amplifier
* (PA) output voltage detector. This same detector is used during Tx of
......@@ -91,13 +91,13 @@
* DO NOT ALTER THIS STRUCTURE!!!
*/
struct il3945_eeprom_txpower_sample {
u8 gain_index; /* index into power (gain) setup table ... */
u8 gain_idx; /* idx into power (gain) setup table ... */
s8 power; /* ... for this pwr level for this chnl group */
u16 v_det; /* PA output voltage */
} __packed;
/*
* Mappings of Tx power levels -> nominal radio/DSP gain table indexes.
* Mappings of Tx power levels -> nominal radio/DSP gain table idxes.
* One for each channel group (a.k.a. "band") (1 for BG, 4 for A).
* Tx power setup code interpolates between the 5 "sample" power levels
* to determine the nominal setup for a requested power level.
......
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This diff is collapsed.
......@@ -203,7 +203,7 @@ static inline int il4965_hw_valid_rtc_data_addr(u32 addr)
* 1) Compare desired txpower vs. (EEPROM) regulatory limit for this channel.
* Do not exceed regulatory limit; reduce target txpower if necessary.
*
* If setting up txpowers for MIMO rates (rate indexes 8-15, 24-31),
* If setting up txpowers for MIMO rates (rate idxes 8-15, 24-31),
* 2 transmitters will be used simultaneously; driver must reduce the
* regulatory limit by 3 dB (half-power) for each transmitter, so the
* combined total output of the 2 transmitters is within regulatory limits.
......@@ -269,7 +269,7 @@ static inline int il4965_hw_valid_rtc_data_addr(u32 addr)
* be used (although only one at a time) even for non-MIMO transmissions.
*
* Driver should interpolate factory values for temperature, gain table
* index, and actual power. The power amplifier detector values are
* idx, and actual power. The power amplifier detector values are
* not used by the driver.
*
* Sanity check: If the target channel happens to be one of the sample
......@@ -278,13 +278,13 @@ static inline int il4965_hw_valid_rtc_data_addr(u32 addr)
*
*
* 5) Find difference between desired txpower and (interpolated)
* factory-measured txpower. Using (interpolated) factory gain table index
* (shown elsewhere) as a starting point, adjust this index lower to
* factory-measured txpower. Using (interpolated) factory gain table idx
* (shown elsewhere) as a starting point, adjust this idx lower to
* increase txpower, or higher to decrease txpower, until the target
* txpower is reached. Each step in the gain table is 1/2 dB.
*
* For example, if factory measured txpower is 16 dBm, and target txpower
* is 13 dBm, add 6 steps to the factory gain index to reduce txpower
* is 13 dBm, add 6 steps to the factory gain idx to reduce txpower
* by 3 dB.
*
*
......@@ -294,7 +294,7 @@ static inline int il4965_hw_valid_rtc_data_addr(u32 addr)
* "4965 temperature calculation".
*
* If current temperature is higher than factory temperature, driver must
* increase gain (lower gain table index), and vice verse.
* increase gain (lower gain table idx), and vice verse.
*
* Temperature affects gain differently for different channels:
*
......@@ -313,16 +313,16 @@ static inline int il4965_hw_valid_rtc_data_addr(u32 addr)
* indicator (EEPROM).
*
* If the current voltage is higher (indicator is lower) than factory
* voltage, gain should be reduced (gain table index increased) by:
* voltage, gain should be reduced (gain table idx increased) by:
*
* (eeprom - current) / 7
*
* If the current voltage is lower (indicator is higher) than factory
* voltage, gain should be increased (gain table index decreased) by:
* voltage, gain should be increased (gain table idx decreased) by:
*
* 2 * (current - eeprom) / 7
*
* If number of index steps in either direction turns out to be > 2,
* If number of idx steps in either direction turns out to be > 2,
* something is wrong ... just use 0.
*
* NOTE: Voltage compensation is independent of band/channel.
......@@ -333,7 +333,7 @@ static inline int il4965_hw_valid_rtc_data_addr(u32 addr)
* may be calculated once and used until the next uCode bootload.
*
*
* 8) If setting up txpowers for MIMO rates (rate indexes 8-15, 24-31),
* 8) If setting up txpowers for MIMO rates (rate idxes 8-15, 24-31),
* adjust txpower for each transmitter chain, so txpower is balanced
* between the two chains. There are 5 pairs of tx_atten[group][chain]
* values in "initialize alive", one pair for each of 5 channel ranges:
......@@ -344,7 +344,7 @@ static inline int il4965_hw_valid_rtc_data_addr(u32 addr)
* Group 3: 5 GHz channel 125-200
* Group 4: 2.4 GHz all channels
*
* Add the tx_atten[group][chain] value to the index for the target chain.
* Add the tx_atten[group][chain] value to the idx for the target chain.
* The values are signed, but are in pairs of 0 and a non-negative number,
* so as to reduce gain (if necessary) of the "hotter" channel. This
* avoids any need to double-check for regulatory compliance after
......@@ -352,7 +352,7 @@ static inline int il4965_hw_valid_rtc_data_addr(u32 addr)
*
*
* 9) If setting up for a CCK rate, lower the gain by adding a CCK compensation
* value to the index:
* value to the idx:
*
* Hardware rev B: 9 steps (4.5 dB)
* Hardware rev C: 5 steps (2.5 dB)
......@@ -366,7 +366,7 @@ static inline int il4965_hw_valid_rtc_data_addr(u32 addr)
*
* 10) Select the gain table, based on band (2.4 vs 5 GHz).
*
* Limit the adjusted index to stay within the table!
* Limit the adjusted idx to stay within the table!
*
*
* 11) Read gain table entries for DSP and radio gain, place into appropriate
......@@ -389,7 +389,7 @@ static inline int il4965_hw_valid_rtc_data_addr(u32 addr)
*
* When calculating txpowers for CCK, after making sure that the target power
* is within regulatory and saturation limits, driver must additionally
* back off gain by adding these values to the gain table index.
* back off gain by adding these values to the gain table idx.
*
* Hardware rev for 4965 can be determined by reading CSR_HW_REV_WA_REG,
* bits [3:2], 1 = B, 2 = C.
......@@ -428,9 +428,9 @@ static inline int il4965_hw_valid_rtc_data_addr(u32 addr)
* driver work with the same table).
*
* There are separate tables for 2.4 GHz and 5 GHz bands. The 5 GHz table
* has an extension (into negative indexes), in case the driver needs to
* has an extension (into negative idxes), in case the driver needs to
* boost power setting for high device temperatures (higher than would be
* present during factory calibration). A 5 Ghz EEPROM index of "40"
* present during factory calibration). A 5 Ghz EEPROM idx of "40"
* corresponds to the 49th entry in the table used by the driver.
*/
#define MIN_TX_GAIN_IDX (0) /* highest gain, lowest idx, 2.4 */
......@@ -778,8 +778,8 @@ enum {
*
* When driver sets up a new TFD, it must also enter the total byte count
* of the frame to be transmitted into the corresponding entry in the byte
* count table for the chosen Tx queue. If the TFD index is 0-63, the driver
* must duplicate the byte count entry in corresponding index 256-319.
* count table for the chosen Tx queue. If the TFD idx is 0-63, the driver
* must duplicate the byte count entry in corresponding idx 256-319.
*
* padding puts each byte count table on a 1024-byte boundary;
* 4965 assumes tables are separated by 1024 bytes.
......
......@@ -105,7 +105,7 @@ int il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
/* Stop Rx DMA */
il_wr(il, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
/* Reset driver's Rx queue write index */
/* Reset driver's Rx queue write idx */
il_wr(il, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
/* Tell device where to find RBD circular buffer in DRAM */
......@@ -222,7 +222,7 @@ static inline __le32 il4965_dma_addr2rbd_ptr(struct il_priv *il,
* and we have free pre-allocated buffers, fill the ranks as much
* as we can, pulling from rx_free.
*
* This moves the 'write' index forward to catch up with 'processed', and
* This moves the 'write' idx forward to catch up with 'processed', and
* also updates the memory address in the firmware to reference the new
* target buffer.
*/
......
This diff is collapsed.
......@@ -157,7 +157,7 @@ static int il4965_static_wepkey_cmd(struct il_priv *il,
(sizeof(struct il_wep_key) * WEP_KEYS_MAX));
for (i = 0; i < WEP_KEYS_MAX ; i++) {
wep_cmd->key[i].key_index = i;
wep_cmd->key[i].key_idx = i;
if (ctx->wep_keys[i].key_size) {
wep_cmd->key[i].key_offset = i;
not_empty = 1;
......@@ -283,7 +283,7 @@ static int il4965_set_wep_dynamic_key_info(struct il_priv *il,
if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
== STA_KEY_FLG_NO_ENC)
il->stations[sta_id].sta.key.key_offset =
il_get_free_ucode_key_index(il);
il_get_free_ucode_key_idx(il);
/* else, we are overriding an existing key => no need to allocated room
* in uCode. */
......@@ -334,7 +334,7 @@ static int il4965_set_ccmp_dynamic_key_info(struct il_priv *il,
if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
== STA_KEY_FLG_NO_ENC)
il->stations[sta_id].sta.key.key_offset =
il_get_free_ucode_key_index(il);
il_get_free_ucode_key_idx(il);
/* else, we are overriding an existing key => no need to allocated room
* in uCode. */
......@@ -379,7 +379,7 @@ static int il4965_set_tkip_dynamic_key_info(struct il_priv *il,
if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
== STA_KEY_FLG_NO_ENC)
il->stations[sta_id].sta.key.key_offset =
il_get_free_ucode_key_index(il);
il_get_free_ucode_key_idx(il);
/* else, we are overriding an existing key => no need to allocated room
* in uCode. */
......@@ -457,9 +457,9 @@ int il4965_remove_dynamic_key(struct il_priv *il,
keyconf->keyidx, sta_id);
if (keyconf->keyidx != keyidx) {
/* We need to remove a key with index different that the one
/* We need to remove a key with idx different that the one
* in the uCode. This means that the key we need to remove has
* been replaced by another one with different index.
* been replaced by another one with different idx.
* Don't do anything and return ok
*/
spin_unlock_irqrestore(&il->sta_lock, flags);
......@@ -475,7 +475,7 @@ int il4965_remove_dynamic_key(struct il_priv *il,
if (!test_and_clear_bit(il->stations[sta_id].sta.key.key_offset,
&il->ucode_key_table))
IL_ERR("index %d not used in uCode key table.\n",
IL_ERR("idx %d not used in uCode key table.\n",
il->stations[sta_id].sta.key.key_offset);
memset(&il->stations[sta_id].keyinfo, 0,
sizeof(struct il_hw_key));
......
......@@ -183,7 +183,7 @@ static void il4965_tx_cmd_build_rate(struct il_priv *il,
/* DATA packets will use the uCode station table for rate/antenna
* selection */
if (ieee80211_is_data(fc)) {
tx_cmd->initial_rate_index = 0;
tx_cmd->initial_rate_idx = 0;
tx_cmd->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
return;
}
......@@ -192,7 +192,7 @@ static void il4965_tx_cmd_build_rate(struct il_priv *il,
* If the current TX rate stored in mac80211 has the MCS bit set, it's
* not really a TX rate. Thus, we use the lowest supported rate for
* this band. Also use the lowest supported rate if the stored rate
* index is invalid.
* idx is invalid.
*/
rate_idx = info->control.rates[0].idx;
if ((info->control.rates[0].flags & IEEE80211_TX_RC_MCS) ||
......@@ -319,7 +319,7 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb)
if (!ieee80211_is_data(fc))
sta_id = ctx->bcast_sta_id;
else {
/* Find index into station table for destination station */
/* Find idx into station table for destination station */
sta_id = il_sta_id_or_broadcast(il, ctx, info->control.sta);
if (sta_id == IL_INVALID_STATION) {
......@@ -417,7 +417,7 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb)
/*
* Set up the Tx-command (not MAC!) header.
* Store the chosen Tx queue and TFD index within the sequence field;
* Store the chosen Tx queue and TFD idx within the sequence field;
* after Tx, uCode's Tx response will return this value so driver can
* locate the frame within the tx queue and do post-tx processing.
*/
......@@ -513,7 +513,7 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb)
pci_dma_sync_single_for_device(il->pci_dev, txcmd_phys,
firstlen, PCI_DMA_BIDIRECTIONAL);
/* Tell device the write index *just past* this latest filled TFD */
/* Tell device the write idx *just past* this latest filled TFD */
q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
il_txq_update_write_ptr(il, txq);
spin_unlock_irqrestore(&il->lock, flags);
......@@ -828,7 +828,7 @@ static int il4965_txq_agg_enable(struct il_priv *il, int txq_id,
/* Set this queue as a chain-building queue */
il_set_bits_prph(il, IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
/* Place first TFD at index corresponding to start sequence number.
/* Place first TFD at idx corresponding to start sequence number.
* Assumes that ssn_idx is valid (!= 0xFFF) */
il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
......@@ -1105,7 +1105,7 @@ il4965_tx_status(struct il_priv *il, struct il_tx_info *tx_info,
ieee80211_tx_status_irqsafe(il->hw, tx_info->skb);
}
int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int index)
int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx)
{
struct il_tx_queue *txq = &il->txq[txq_id];
struct il_queue *q = &txq->q;
......@@ -1113,15 +1113,15 @@ int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int index)
int nfreed = 0;
struct ieee80211_hdr *hdr;
if (index >= q->n_bd || il_queue_used(q, index) == 0) {
IL_ERR("Read index for DMA queue txq id (%d), index %d, "
if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
"is out of range [0-%d] %d %d.\n", txq_id,
index, q->n_bd, q->write_ptr, q->read_ptr);
idx, q->n_bd, q->write_ptr, q->read_ptr);
return 0;
}
for (index = il_queue_inc_wrap(index, q->n_bd);
q->read_ptr != index;
for (idx = il_queue_inc_wrap(idx, q->n_bd);
q->read_ptr != idx;
q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
tx_info = &txq->txb[txq->q.read_ptr];
......@@ -1252,7 +1252,7 @@ void il4965_rx_reply_compressed_ba(struct il_priv *il,
struct il_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
struct il_tx_queue *txq = NULL;
struct il_ht_agg *agg;
int index;
int idx;
int sta_id;
int tid;
unsigned long flags;
......@@ -1260,7 +1260,7 @@ void il4965_rx_reply_compressed_ba(struct il_priv *il,
/* "flow" corresponds to Tx queue */
u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
/* "ssn" is start of block-ack Tx win, corresponds to index
/* "ssn" is start of block-ack Tx win, corresponds to idx
* (in Tx queue's circular buffer) of first TFD/frame in win */
u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
......@@ -1287,8 +1287,8 @@ void il4965_rx_reply_compressed_ba(struct il_priv *il,
return;
}
/* Find index just before block-ack win */
index = il_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
/* Find idx just before block-ack win */
idx = il_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
spin_lock_irqsave(&il->sta_lock, flags);
......@@ -1317,7 +1317,7 @@ void il4965_rx_reply_compressed_ba(struct il_priv *il,
* transmitted ... if not, it's too late anyway). */
if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
/* calculate mac80211 ampdu sw queue to wake */
int freed = il4965_tx_queue_reclaim(il, scd_flow, index);
int freed = il4965_tx_queue_reclaim(il, scd_flow, idx);
il4965_free_tfds_in_queue(il, sta_id, tid, freed);
if (il_queue_space(&txq->q) > txq->q.low_mark &&
......
......@@ -446,12 +446,12 @@ static s32 il4965_math_div_round(s32 num, s32 denom, s32 *res)
* il4965_get_voltage_compensation - Power supply voltage comp for txpower
*
* Determines power supply voltage compensation for txpower calculations.
* Returns number of 1/2-dB steps to subtract from gain table index,
* Returns number of 1/2-dB steps to subtract from gain table idx,
* to compensate for difference between power supply voltage during
* factory measurements, vs. current power supply voltage.
*
* Voltage indication is higher for lower voltage.
* Lower voltage requires more gain (lower gain table index).
* Lower voltage requires more gain (lower gain table idx).
*/
static s32 il4965_get_voltage_compensation(s32 eeprom_voltage,
s32 current_voltage)
......@@ -628,10 +628,10 @@ static struct il4965_txpower_comp_entry {
{3, 1} /* group 4 2.4, ch all */
};
static s32 get_min_power_index(s32 rate_power_index, u32 band)
static s32 get_min_power_idx(s32 rate_power_idx, u32 band)
{
if (!band) {
if ((rate_power_index & 7) <= 4)
if ((rate_power_idx & 7) <= 4)
return MIN_TX_GAIN_IDX_52GHZ_EXT;
}
return MIN_TX_GAIN_IDX;
......@@ -643,7 +643,7 @@ struct gain_entry {
};
static const struct gain_entry gain_table[2][108] = {
/* 5.2GHz power gain index table */
/* 5.2GHz power gain idx table */
{
{123, 0x3F}, /* highest txpower */
{117, 0x3F},
......@@ -754,7 +754,7 @@ static const struct gain_entry gain_table[2][108] = {
{83, 0x00},
{78, 0x00},
},
/* 2.4GHz power gain index table */
/* 2.4GHz power gain idx table */
{
{110, 0x3f}, /* highest txpower */
{104, 0x3f},
......@@ -891,12 +891,12 @@ static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel,
s32 degrees_per_05db_denom;
s32 factory_temp;
s32 temperature_comp[2];
s32 factory_gain_index[2];
s32 factory_gain_idx[2];
s32 factory_actual_pwr[2];
s32 power_index;
s32 power_idx;
/* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
* are used for indexing into txpower table) */
* are used for idxing into txpower table) */
user_target_power = 2 * il->tx_power_user_lmt;
/* Get current (RXON) channel, band, width */
......@@ -995,7 +995,7 @@ static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel,
degrees_per_05db_num,
&temperature_comp[c]);
factory_gain_index[c] = measurement->gain_idx;
factory_gain_idx[c] = measurement->gain_idx;
factory_actual_pwr[c] = measurement->actual_pow;
D_TXPOWER("chain = %d\n", c);
......@@ -1005,7 +1005,7 @@ static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel,
temperature_comp[c]);
D_TXPOWER("fctry idx %d, fctry pwr %d\n",
factory_gain_index[c],
factory_gain_idx[c],
factory_actual_pwr[c]);
}
......@@ -1053,50 +1053,50 @@ static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel,
else
atten_value = 0;
/* calculate index; higher index means lower txpower */
power_index = (u8) (factory_gain_index[c] -
/* calculate idx; higher idx means lower txpower */
power_idx = (u8) (factory_gain_idx[c] -
(target_power -
factory_actual_pwr[c]) -
temperature_comp[c] -
voltage_compensation +
atten_value);
/* D_TXPOWER("calculated txpower index %d\n",
power_index); */
/* D_TXPOWER("calculated txpower idx %d\n",
power_idx); */
if (power_index < get_min_power_index(i, band))
power_index = get_min_power_index(i, band);
if (power_idx < get_min_power_idx(i, band))
power_idx = get_min_power_idx(i, band);
/* adjust 5 GHz index to support negative indexes */
/* adjust 5 GHz idx to support negative idxes */
if (!band)
power_index += 9;
power_idx += 9;
/* CCK, rate 32, reduce txpower for CCK */
if (i == POWER_TABLE_CCK_ENTRY)
power_index +=
power_idx +=
IL_TX_POWER_CCK_COMPENSATION_C_STEP;
/* stay within the table! */
if (power_index > 107) {
IL_WARN("txpower index %d > 107\n",
power_index);
power_index = 107;
if (power_idx > 107) {
IL_WARN("txpower idx %d > 107\n",
power_idx);
power_idx = 107;
}
if (power_index < 0) {
IL_WARN("txpower index %d < 0\n",
power_index);
power_index = 0;
if (power_idx < 0) {
IL_WARN("txpower idx %d < 0\n",
power_idx);
power_idx = 0;
}
/* fill txpower command for this rate/chain */
tx_power.s.radio_tx_gain[c] =
gain_table[band][power_index].radio;
gain_table[band][power_idx].radio;
tx_power.s.dsp_predis_atten[c] =
gain_table[band][power_index].dsp;
gain_table[band][power_idx].dsp;
D_TXPOWER("chain %d mimo %d index %d "
D_TXPOWER("chain %d mimo %d idx %d "
"gain 0x%02x dsp %d\n",
c, atten_value, power_index,
c, atten_value, power_idx,
tx_power.s.radio_tx_gain[c],
tx_power.s.dsp_predis_atten[c]);
} /* for each chain */
......@@ -1777,7 +1777,7 @@ static void il4965_rx_reply_tx(struct il_priv *il,
struct il_rx_pkt *pkt = rxb_addr(rxb);
u16 sequence = le16_to_cpu(pkt->hdr.sequence);
int txq_id = SEQ_TO_QUEUE(sequence);
int index = SEQ_TO_IDX(sequence);
int idx = SEQ_TO_IDX(sequence);
struct il_tx_queue *txq = &il->txq[txq_id];
struct ieee80211_hdr *hdr;
struct ieee80211_tx_info *info;
......@@ -1789,10 +1789,10 @@ static void il4965_rx_reply_tx(struct il_priv *il,
u8 *qc = NULL;
unsigned long flags;
if (index >= txq->q.n_bd || il_queue_used(&txq->q, index) == 0) {
IL_ERR("Read index for DMA queue txq_id (%d) index %d "
if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
"is out of range [0-%d] %d %d\n", txq_id,
index, txq->q.n_bd, txq->q.write_ptr,
idx, txq->q.n_bd, txq->q.write_ptr,
txq->q.read_ptr);
return;
}
......@@ -1801,7 +1801,7 @@ static void il4965_rx_reply_tx(struct il_priv *il,
info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb);
memset(&info->status, 0, sizeof(info->status));
hdr = il_tx_queue_get_hdr(il, txq_id, index);
hdr = il_tx_queue_get_hdr(il, txq_id, idx);
if (ieee80211_is_data_qos(hdr->frame_control)) {
qc = ieee80211_get_qos_ctl(hdr);
tid = qc[0] & 0xf;
......@@ -1821,18 +1821,18 @@ static void il4965_rx_reply_tx(struct il_priv *il,
agg = &il->stations[sta_id].tid[tid].agg;
il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, index);
il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx);
/* check if BAR is needed */
if ((tx_resp->frame_count == 1) && !il4965_is_tx_success(status))
info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
if (txq->q.read_ptr != (scd_ssn & 0xff)) {
index = il_queue_dec_wrap(scd_ssn & 0xff,
idx = il_queue_dec_wrap(scd_ssn & 0xff,
txq->q.n_bd);
D_TX_REPLY("Retry scheduler reclaim scd_ssn "
"%d index %d\n", scd_ssn , index);
freed = il4965_tx_queue_reclaim(il, txq_id, index);
"%d idx %d\n", scd_ssn , idx);
freed = il4965_tx_queue_reclaim(il, txq_id, idx);
if (qc)
il4965_free_tfds_in_queue(il, sta_id,
tid, freed);
......@@ -1856,7 +1856,7 @@ static void il4965_rx_reply_tx(struct il_priv *il,
le32_to_cpu(tx_resp->rate_n_flags),
tx_resp->failure_frame);
freed = il4965_tx_queue_reclaim(il, txq_id, index);
freed = il4965_tx_queue_reclaim(il, txq_id, idx);
if (qc && likely(sta_id != IL_INVALID_STATION))
il4965_free_tfds_in_queue(il, sta_id, tid, freed);
else if (sta_id == IL_INVALID_STATION)
......
......@@ -123,7 +123,7 @@ int il4965_txq_check_empty(struct il_priv *il,
int sta_id, u8 tid, int txq_id);
void il4965_rx_reply_compressed_ba(struct il_priv *il,
struct il_rx_buf *rxb);
int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int index);
int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx);
void il4965_hw_txq_ctx_free(struct il_priv *il);
int il4965_txq_ctx_alloc(struct il_priv *il);
void il4965_txq_ctx_reset(struct il_priv *il);
......@@ -133,7 +133,7 @@ void il4965_txq_set_sched(struct il_priv *il, u32 mask);
/*
* Acquire il->lock before calling this function !
*/
void il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 index);
void il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 idx);
/**
* il4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
* @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
......
......@@ -197,7 +197,7 @@ struct il_cmd_header {
*
* The Linux driver uses the following format:
*
* 0:7 tfd index - position within TX queue
* 0:7 tfd idx - position within TX queue
* 8:12 TX queue id
* 13 reserved
* 14 huge - driver sets this to indicate command is in the
......@@ -454,7 +454,7 @@ struct il_init_alive_resp {
* __le32 log_size; log capacity (in number of entries)
* __le32 type; (1) timestamp with each entry, (0) no timestamp
* __le32 wraps; # times uCode has wrapped to top of circular buffer
* __le32 write_index; next circular buffer entry that uCode would fill
* __le32 write_idx; next circular buffer entry that uCode would fill
*
* The header is followed by the circular buffer of log entries. Entries
* with timestamps have the following format:
......@@ -901,7 +901,7 @@ struct il_qosparam_cmd {
#define STA_MODIFY_DELBA_TID_MSK 0x10
#define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20
/* Receiver address (actually, Rx station's index into station table),
/* Receiver address (actually, Rx station's idx into station table),
* combined with Traffic ID (QOS priority), in format used by Tx Scheduler */
#define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid))
......@@ -918,12 +918,12 @@ struct il4965_keyinfo {
/**
* struct sta_id_modify
* @addr[ETH_ALEN]: station's MAC address
* @sta_id: index of station in uCode's station table
* @sta_id: idx of station in uCode's station table
* @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change
*
* Driver selects unused table index when adding new station,
* or the index to a pre-existing station entry when modifying that station.
* Some indexes have special purposes (IL_AP_ID, index 0, is for AP).
* Driver selects unused table idx when adding new station,
* or the idx to a pre-existing station entry when modifying that station.
* Some idxes have special purposes (IL_AP_ID, idx 0, is for AP).
*
* modify_mask flags select which parameters to modify vs. leave alone.
*/
......@@ -959,7 +959,7 @@ struct sta_id_modify {
* in the IL_AP_ID entry (1st entry in the table). BROADCAST and AP
* are all that are needed for a BSS client station. If the device is
* used as AP, or in an IBSS network, driver must set up station table
* entries for all STAs in network, starting with index IL_STA_ID.
* entries for all STAs in network, starting with idx IL_STA_ID.
*/
struct il3945_addsta_cmd {
......@@ -1109,7 +1109,7 @@ struct il_rem_sta_cmd {
* REPLY_WEP_KEY = 0x20
*/
struct il_wep_key {
u8 key_index;
u8 key_idx;
u8 key_offset;
u8 reserved1[2];
u8 key_size;
......@@ -1297,7 +1297,7 @@ struct il_rx_mpdu_res_start {
/* For 4965 devices:
* 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
* Tx command's initial_rate_index indicates first rate to try;
* Tx command's initial_rate_idx indicates first rate to try;
* uCode walks through table for additional Tx attempts.
* 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
* This rate will be used for all Tx attempts; it will not be scaled. */
......@@ -1499,7 +1499,7 @@ struct il_tx_cmd {
* rate (via non-0 value) for special frames (e.g. management), while
* still supporting rate scaling for all frames.
*/
u8 initial_rate_index;
u8 initial_rate_idx;
u8 reserved;
u8 key[16];
__le16 next_frame_flags;
......@@ -1792,7 +1792,7 @@ struct il4965_txpowertable_cmd {
struct il3945_rate_scaling_info {
__le16 rate_n_flags;
u8 try_cnt;
u8 next_rate_index;
u8 next_rate_idx;
} __packed;
struct il3945_rate_scaling_cmd {
......@@ -1825,7 +1825,7 @@ struct il3945_rate_scaling_cmd {
struct il_link_qual_general_params {
u8 flags;
/* No entries at or above this (driver chosen) index contain MIMO */
/* No entries at or above this (driver chosen) idx contain MIMO */
u8 mimo_delimiter;
/* Best single antenna to use for single stream (legacy, SISO). */
......@@ -1837,7 +1837,7 @@ struct il_link_qual_general_params {
/*
* If driver needs to use different initial rates for different
* EDCA QOS access categories (as implemented by tx fifos 0-3),
* this table will set that up, by indicating the indexes in the
* this table will set that up, by indicating the idxes in the
* rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
* Otherwise, driver should set all entries to 0.
*
......@@ -1845,7 +1845,7 @@ struct il_link_qual_general_params {
* 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
* TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
*/
u8 start_rate_index[LINK_QUAL_AC_NUM];
u8 start_rate_idx[LINK_QUAL_AC_NUM];
} __packed;
#define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */
......@@ -2089,8 +2089,8 @@ struct il_link_quality_cmd {
struct il_link_qual_agg_params agg_params;
/*
* Rate info; when using rate-scaling, Tx command's initial_rate_index
* specifies 1st Tx rate attempted, via index into this table.
* Rate info; when using rate-scaling, Tx command's initial_rate_idx
* specifies 1st Tx rate attempted, via idx into this table.
* 4965 devices works its way through table when retrying Tx.
*/
struct {
......@@ -2233,7 +2233,7 @@ enum il_measure_type {
struct il_spectrum_notification {
u8 id; /* measurement id -- 0 or 1 */
u8 token;
u8 channel_index; /* index in measurement channel list */
u8 channel_idx; /* idx in measurement channel list */
u8 state; /* 0 - start, 1 - stop */
__le32 start_time; /* lower 32-bits of TSF */
u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */
......@@ -3220,7 +3220,7 @@ struct il_missed_beacon_notif {
* Table entries in SENSITIVITY_CMD (struct il_sensitivity_cmd)
*/
#define HD_TABLE_SIZE (11) /* number of entries */
#define HD_MIN_ENERGY_CCK_DET_IDX (0) /* table indexes */
#define HD_MIN_ENERGY_CCK_DET_IDX (0) /* table idxes */
#define HD_MIN_ENERGY_OFDM_DET_IDX (1)
#define HD_AUTO_CORR32_X1_TH_ADD_MIN_IDX (2)
#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_IDX (3)
......@@ -3239,13 +3239,13 @@ struct il_missed_beacon_notif {
/**
* struct il_sensitivity_cmd
* @control: (1) updates working table, (0) updates default table
* @table: energy threshold values, use HD_* as index into table
* @table: energy threshold values, use HD_* as idx into table
*
* Always use "1" in "control" to update uCode's working table and DSP.
*/
struct il_sensitivity_cmd {
__le16 control; /* always use "1" */
__le16 table[HD_TABLE_SIZE]; /* use HD_* as index */
__le16 table[HD_TABLE_SIZE]; /* use HD_* as idx */
} __packed;
......
......@@ -411,10 +411,10 @@
#define HBUS_TARG_PRPH_RDAT (HBUS_BASE+0x050)
/*
* Per-Tx-queue write pointer (index, really!)
* Indicates index to next TFD that driver will fill (1 past latest filled).
* Per-Tx-queue write pointer (idx, really!)
* Indicates idx to next TFD that driver will fill (1 past latest filled).
* Bit usage:
* 0-7: queue write index
* 0-7: queue write idx
* 11-8: queue selector
*/
#define HBUS_TARG_WRPTR (HBUS_BASE+0x060)
......
......@@ -125,8 +125,8 @@ struct il_cmd_meta {
*/
struct il_queue {
int n_bd; /* number of BDs in this queue */
int write_ptr; /* 1-st empty entry (index) host_w*/
int read_ptr; /* last used entry (index) host_r*/
int write_ptr; /* 1-st empty entry (idx) host_w*/
int read_ptr; /* last used entry (idx) host_r*/
/* use for monitoring and recovering the stuck queue */
dma_addr_t dma_addr; /* physical addr for BD's */
int n_win; /* safe queue win */
......@@ -152,7 +152,7 @@ struct il_tx_info {
* @dma_addr_cmd: physical address of cmd/tx buffer array
* @txb: array of per-TFD driver data
* @time_stamp: time (in jiffies) of last read_ptr change
* @need_update: indicates need to update read/write index
* @need_update: indicates need to update read/write idx
* @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
*
* A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
......@@ -199,11 +199,11 @@ struct il3945_clip_group {
* -- hardware capabilities (clip-powers)
* -- spectrum management
* -- user preference (e.g. iwconfig)
* when requested power is set, base power index must also be set. */
* when requested power is set, base power idx must also be set. */
struct il3945_channel_power_info {
struct il3945_tx_power tpc; /* actual radio and DSP gain settings */
s8 power_table_index; /* actual (compenst'd) index into gain table */
s8 base_power_index; /* gain index for power at factory temp. */
s8 power_table_idx; /* actual (compenst'd) idx into gain table */
s8 base_power_idx; /* gain idx for power at factory temp. */
s8 requested_power; /* power (dBm) requested for this chnl/rate */
};
......@@ -211,7 +211,7 @@ struct il3945_channel_power_info {
* channel. */
struct il3945_scan_power_info {
struct il3945_tx_power tpc; /* actual radio and DSP gain settings */
s8 power_table_index; /* actual (compenst'd) index into gain table */
s8 power_table_idx; /* actual (compenst'd) idx into gain table */
s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
};
......@@ -234,8 +234,8 @@ struct il_channel_info {
s8 min_power; /* always 0 */
s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
u8 group_idx; /* 0-4, maps channel to group1/2/3/4/5 */
u8 band_idx; /* 0-4, maps channel to band1/2/3/4/5 */
enum ieee80211_band band;
/* HT40 channel info */
......@@ -245,7 +245,7 @@ struct il_channel_info {
/* Radio/DSP gain settings for each "normal" data Tx rate.
* These include, in addition to RF and DSP gain, a few fields for
* remembering/modifying gain settings (indexes). */
* remembering/modifying gain settings (idxes). */
struct il3945_channel_power_info power_info[IL4965_MAX_RATE];
/* Radio/DSP gain settings for each scan rate, for directed scans. */
......@@ -337,12 +337,12 @@ struct il_host_cmd {
* struct il_rx_queue - Rx queue
* @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
* @bd_dma: bus address of buffer of receive buffer descriptors (rbd)
* @read: Shared index to newest available Rx buffer
* @write: Shared index to oldest written Rx packet
* @read: Shared idx to newest available Rx buffer
* @write: Shared idx to oldest written Rx packet
* @free_count: Number of pre-allocated buffers in rx_free
* @rx_free: list of free SKBs for use
* @rx_used: List of Rx buffers with no SKB
* @need_update: flag to indicate we need to update read/write index
* @need_update: flag to indicate we need to update read/write idx
* @rb_stts: driver's pointer to receive buffer status
* @rb_stts_dma: bus address of receive buffer status
*
......@@ -636,7 +636,7 @@ static inline int il_queue_used(const struct il_queue *q, int i)
}
static inline u8 il_get_cmd_index(struct il_queue *q, u32 index,
static inline u8 il_get_cmd_idx(struct il_queue *q, u32 idx,
int is_huge)
{
/*
......@@ -648,7 +648,7 @@ static inline u8 il_get_cmd_index(struct il_queue *q, u32 index,
return q->n_win; /* must be power of 2 */
/* Otherwise, use normal size buffers */
return index & (q->n_win - 1);
return idx & (q->n_win - 1);
}
......@@ -987,7 +987,7 @@ struct il_priv {
struct il_force_reset force_reset;
/* we allocate array of il_channel_info for NIC's valid channels.
* Access via channel # using indirect index array */
* Access via channel # using indirect idx array */
struct il_channel_info *channel_info; /* channel info array */
u8 channel_count; /* # of channels */
......@@ -1033,7 +1033,7 @@ struct il_priv {
struct mac_address addresses[1];
/* uCode images, save to reload in case of failure */
int fw_index; /* firmware we're trying to load */
int fw_idx; /* firmware we're trying to load */
u32 ucode_ver; /* version of ucode, copy of
il_ucode.ver */
struct fw_desc ucode_code; /* runtime inst */
......
......@@ -89,7 +89,7 @@
* During init, we copy the eeprom information and channel map
* information into il->channel_info_24/52 and il->channel_map_24/52
*
* channel_map_24/52 provides the index in the channel_info array for a
* channel_map_24/52 provides the idx in the channel_info array for a
* given channel. We have to have two separate maps as there is channel
* overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
* band_2
......@@ -267,7 +267,7 @@ EXPORT_SYMBOL(il_eeprom_free);
static void il_init_band_reference(const struct il_priv *il,
int eep_band, int *eeprom_ch_count,
const struct il_eeprom_channel **eeprom_ch_info,
const u8 **eeprom_ch_index)
const u8 **eeprom_ch_idx)
{
u32 offset = il->cfg->ops->lib->
eeprom_ops.regulatory_bands[eep_band - 1];
......@@ -276,43 +276,43 @@ static void il_init_band_reference(const struct il_priv *il,
*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
*eeprom_ch_info = (struct il_eeprom_channel *)
il_eeprom_query_addr(il, offset);
*eeprom_ch_index = il_eeprom_band_1;
*eeprom_ch_idx = il_eeprom_band_1;
break;
case 2: /* 4.9GHz band */
*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
*eeprom_ch_info = (struct il_eeprom_channel *)
il_eeprom_query_addr(il, offset);
*eeprom_ch_index = il_eeprom_band_2;
*eeprom_ch_idx = il_eeprom_band_2;
break;
case 3: /* 5.2GHz band */
*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
*eeprom_ch_info = (struct il_eeprom_channel *)
il_eeprom_query_addr(il, offset);
*eeprom_ch_index = il_eeprom_band_3;
*eeprom_ch_idx = il_eeprom_band_3;
break;
case 4: /* 5.5GHz band */
*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
*eeprom_ch_info = (struct il_eeprom_channel *)
il_eeprom_query_addr(il, offset);
*eeprom_ch_index = il_eeprom_band_4;
*eeprom_ch_idx = il_eeprom_band_4;
break;
case 5: /* 5.7GHz band */
*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
*eeprom_ch_info = (struct il_eeprom_channel *)
il_eeprom_query_addr(il, offset);
*eeprom_ch_index = il_eeprom_band_5;
*eeprom_ch_idx = il_eeprom_band_5;
break;
case 6: /* 2.4GHz ht40 channels */
*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
*eeprom_ch_info = (struct il_eeprom_channel *)
il_eeprom_query_addr(il, offset);
*eeprom_ch_index = il_eeprom_band_6;
*eeprom_ch_idx = il_eeprom_band_6;
break;
case 7: /* 5 GHz ht40 channels */
*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
*eeprom_ch_info = (struct il_eeprom_channel *)
il_eeprom_query_addr(il, offset);
*eeprom_ch_index = il_eeprom_band_7;
*eeprom_ch_idx = il_eeprom_band_7;
break;
default:
BUG();
......@@ -374,7 +374,7 @@ static int il_mod_ht40_chan_info(struct il_priv *il,
int il_init_channel_map(struct il_priv *il)
{
int eeprom_ch_count = 0;
const u8 *eeprom_ch_index = NULL;
const u8 *eeprom_ch_idx = NULL;
const struct il_eeprom_channel *eeprom_ch_info = NULL;
int band, ch;
struct il_channel_info *ch_info;
......@@ -412,11 +412,11 @@ int il_init_channel_map(struct il_priv *il)
for (band = 1; band <= 5; band++) {
il_init_band_reference(il, band, &eeprom_ch_count,
&eeprom_ch_info, &eeprom_ch_index);
&eeprom_ch_info, &eeprom_ch_idx);
/* Loop through each band adding each of the channels */
for (ch = 0; ch < eeprom_ch_count; ch++) {
ch_info->channel = eeprom_ch_index[ch];
ch_info->channel = eeprom_ch_idx[ch];
ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
IEEE80211_BAND_5GHZ;
......@@ -486,7 +486,7 @@ int il_init_channel_map(struct il_priv *il)
enum ieee80211_band ieeeband;
il_init_band_reference(il, band, &eeprom_ch_count,
&eeprom_ch_info, &eeprom_ch_index);
&eeprom_ch_info, &eeprom_ch_idx);
/* EEPROM band 6 is 2.4, band 7 is 5 GHz */
ieeeband =
......@@ -496,13 +496,13 @@ int il_init_channel_map(struct il_priv *il)
for (ch = 0; ch < eeprom_ch_count; ch++) {
/* Set up driver's info for lower half */
il_mod_ht40_chan_info(il, ieeeband,
eeprom_ch_index[ch],
eeprom_ch_idx[ch],
&eeprom_ch_info[ch],
IEEE80211_CHAN_NO_HT40PLUS);
/* Set up driver's info for upper half */
il_mod_ht40_chan_info(il, ieeeband,
eeprom_ch_index[ch] + 4,
eeprom_ch_idx[ch] + 4,
&eeprom_ch_info[ch],
IEEE80211_CHAN_NO_HT40MINUS);
}
......
......@@ -153,7 +153,7 @@ extern const u8 il_eeprom_band_1[14];
*
* 1) Temperature (degrees Celsius) of device when measurement was made.
*
* 2) Gain table index used to achieve the target measurement power.
* 2) Gain table idx used to achieve the target measurement power.
* This refers to the "well-known" gain tables (see iwl-4965-hw.h).
*
* 3) Actual measured output power, in half-dBm ("34" = 17 dBm).
......
......@@ -141,7 +141,7 @@
* into FH_RSCSR_CHNL0_RBDCB_BASE_REG [27:0].
*
* 2) Rx status buffer, 8 bytes, in which 4965 indicates which Rx Buffers
* (RBs) have been filled, via a "write pointer", actually the index of
* (RBs) have been filled, via a "write pointer", actually the idx of
* the RB's corresponding RBD within the circular buffer. Driver sets
* physical address [35:4] into FH_RSCSR_CHNL0_STTS_WPTR_REG [31:0].
*
......@@ -153,33 +153,33 @@
*
* As the driver prepares Receive Buffers (RBs) for 4965 to fill, driver must
* enter pointers to these RBs into contiguous RBD circular buffer entries,
* and update the 4965's "write" index register,
* and update the 4965's "write" idx register,
* FH_RSCSR_CHNL0_RBDCB_WPTR_REG.
*
* This "write" index corresponds to the *next* RBD that the driver will make
* This "write" idx corresponds to the *next* RBD that the driver will make
* available, i.e. one RBD past the tail of the ready-to-fill RBDs within
* the circular buffer. This value should initially be 0 (before preparing any
* RBs), should be 8 after preparing the first 8 RBs (for example), and must
* wrap back to 0 at the end of the circular buffer (but don't wrap before
* "read" index has advanced past 1! See below).
* "read" idx has advanced past 1! See below).
* NOTE: 4965 EXPECTS THE WRITE IDX TO BE INCREMENTED IN MULTIPLES OF 8.
*
* As the 4965 fills RBs (referenced from contiguous RBDs within the circular
* buffer), it updates the Rx status buffer in host DRAM, 2) described above,
* to tell the driver the index of the latest filled RBD. The driver must
* read this "read" index from DRAM after receiving an Rx interrupt from 4965.
* to tell the driver the idx of the latest filled RBD. The driver must
* read this "read" idx from DRAM after receiving an Rx interrupt from 4965.
*
* The driver must also internally keep track of a third index, which is the
* The driver must also internally keep track of a third idx, which is the
* next RBD to process. When receiving an Rx interrupt, driver should process
* all filled but unprocessed RBs up to, but not including, the RB
* corresponding to the "read" index. For example, if "read" index becomes "1",
* corresponding to the "read" idx. For example, if "read" idx becomes "1",
* driver may process the RB pointed to by RBD 0. Depending on volume of
* traffic, there may be many RBs to process.
*
* If read index == write index, 4965 thinks there is no room to put new data.
* If read idx == write idx, 4965 thinks there is no room to put new data.
* Due to this, the maximum number of filled RBs is 255, instead of 256. To
* be safe, make sure that there is a gap of at least 2 RBDs between "write"
* and "read" indexes; that is, make sure that there are no more than 254
* and "read" idxes; that is, make sure that there are no more than 254
* buffers waiting to be filled.
*/
#define FH_MEM_RSCSR_LOWER_BOUND (FH_MEM_LOWER_BOUND + 0xBC0)
......@@ -201,7 +201,7 @@
#define FH_RSCSR_CHNL0_RBDCB_BASE_REG (FH_MEM_RSCSR_CHNL0 + 0x004)
/**
* Rx write pointer (index, really!).
* Rx write pointer (idx, really!).
* Bit fields:
* 11-0: Index of driver's most recent prepared-to-be-filled RBD, + 1.
* NOTE: For 256-entry circular buffer, use only bits [7:0].
......@@ -431,11 +431,11 @@
/**
* struct il_rb_status - reseve buffer status
* host memory mapped FH registers
* @closed_rb_num [0:11] - Indicates the index of the RB which was closed
* @closed_fr_num [0:11] - Indicates the index of the RX Frame which was closed
* @finished_rb_num [0:11] - Indicates the index of the current RB
* @closed_rb_num [0:11] - Indicates the idx of the RB which was closed
* @closed_fr_num [0:11] - Indicates the idx of the RX Frame which was closed
* @finished_rb_num [0:11] - Indicates the idx of the current RB
* in which the last frame was written to
* @finished_fr_num [0:11] - Indicates the index of the RX Frame
* @finished_fr_num [0:11] - Indicates the idx of the RX Frame
* which was transferred
*/
struct il_rb_status {
......
......@@ -45,23 +45,23 @@ static inline struct ieee80211_conf *il_ieee80211_get_hw_conf(
}
/**
* il_queue_inc_wrap - increment queue index, wrap back to beginning
* @index -- current index
* il_queue_inc_wrap - increment queue idx, wrap back to beginning
* @idx -- current idx
* @n_bd -- total number of entries in queue (must be power of 2)
*/
static inline int il_queue_inc_wrap(int index, int n_bd)
static inline int il_queue_inc_wrap(int idx, int n_bd)
{
return ++index & (n_bd - 1);
return ++idx & (n_bd - 1);
}
/**
* il_queue_dec_wrap - decrement queue index, wrap back to end
* @index -- current index
* il_queue_dec_wrap - decrement queue idx, wrap back to end
* @idx -- current idx
* @n_bd -- total number of entries in queue (must be power of 2)
*/
static inline int il_queue_dec_wrap(int index, int n_bd)
static inline int il_queue_dec_wrap(int idx, int n_bd)
{
return --index & (n_bd - 1);
return --idx & (n_bd - 1);
}
/* TODO: Move fw_desc functions to iwl-pci.ko */
......
......@@ -41,7 +41,7 @@
#include "iwl-core.h"
#include "iwl-io.h"
/* default: IL_LED_BLINK(0) using blinking index table */
/* default: IL_LED_BLINK(0) using blinking idx table */
static int led_mode;
module_param(led_mode, int, S_IRUGO);
MODULE_PARM_DESC(led_mode, "0=system default, "
......
......@@ -49,13 +49,13 @@ struct il3945_rate_info {
u8 next_rs; /* next rate used in rs algo */
u8 prev_rs_tgg; /* previous rate used in TGG rs algo */
u8 next_rs_tgg; /* next rate used in TGG rs algo */
u8 table_rs_index; /* index in rate scale table cmd */
u8 table_rs_idx; /* idx in rate scale table cmd */
u8 prev_table_rs; /* prev in rate table cmd */
};
/*
* These serve as indexes into
* These serve as idxes into
* struct il_rate_info il_rates[RATE_COUNT];
*/
enum {
......@@ -351,7 +351,7 @@ struct il_traffic_load {
* Pointer to this gets passed back and forth between driver and mac80211.
*/
struct il_lq_sta {
u8 active_tbl; /* index of active table, range 0-1 */
u8 active_tbl; /* idx of active table, range 0-1 */
u8 enable_counter; /* indicates HT mode */
u8 stay_in_tbl; /* 1: disallow, 0: allow search for new mode */
u8 search_better_tbl; /* 1: currently trying alternate mode */
......
......@@ -336,7 +336,7 @@
/*
* Driver may need to update queue-empty bits after changing queue's
* write and read pointers (indexes) during (re-)initialization (i.e. when
* write and read pointers (idxes) during (re-)initialization (i.e. when
* scheduler is not tracking what's happening).
* Bit fields:
* 31-16: Write mask -- 1: update empty bit, 0: don't change empty bit
......@@ -351,7 +351,7 @@
* This register points to BC CB for queue 0, must be on 1024-byte boundary.
* Others are spaced by 1024 bytes.
* Each BC CB is 2 bytes * (256 + 64) = 740 bytes, followed by 384 bytes pad.
* (Index into a queue's BC CB) = (index into queue's TFD CB) = (SSN & 0xff).
* (Index into a queue's BC CB) = (idx into queue's TFD CB) = (SSN & 0xff).
* Bit fields:
* 25-00: Byte Count CB physical address [35:10], must be 1024-byte aligned.
*/
......@@ -366,18 +366,18 @@
*/
#define IL49_SCD_TXFACT (IL49_SCD_START_OFFSET + 0x1c)
/*
* Queue (x) Write Pointers (indexes, really!), one for each Tx queue.
* Queue (x) Write Pointers (idxes, really!), one for each Tx queue.
* Initialized and updated by driver as new TFDs are added to queue.
* NOTE: If using Block Ack, index must correspond to frame's
* Start Sequence Number; index = (SSN & 0xff)
* NOTE: If using Block Ack, idx must correspond to frame's
* Start Sequence Number; idx = (SSN & 0xff)
* NOTE: Alternative to HBUS_TARG_WRPTR, which is what Linux driver uses?
*/
#define IL49_SCD_QUEUE_WRPTR(x) (IL49_SCD_START_OFFSET + 0x24 + (x) * 4)
/*
* Queue (x) Read Pointers (indexes, really!), one for each Tx queue.
* For FIFO mode, index indicates next frame to transmit.
* For Scheduler-ACK mode, index indicates first frame in Tx win.
* Queue (x) Read Pointers (idxes, really!), one for each Tx queue.
* For FIFO mode, idx indicates next frame to transmit.
* For Scheduler-ACK mode, idx indicates first frame in Tx win.
* Initialized by driver, updated by scheduler.
*/
#define IL49_SCD_QUEUE_RDPTR(x) (IL49_SCD_START_OFFSET + 0x64 + (x) * 4)
......@@ -395,7 +395,7 @@
/*
* Select which queues interrupt driver when scheduler increments
* a queue's read pointer (index).
* a queue's read pointer (idx).
* Bit fields:
* 31-16: Reserved
* 15-00: Interrupt enable, one bit for each queue -- 1: enabled, 0: disabled
......
......@@ -45,17 +45,17 @@
* each of which point to Receive Buffers to be filled by the NIC. These get
* used not only for Rx frames, but for any command response or notification
* from the NIC. The driver and NIC manage the Rx buffers by means
* of indexes into the circular buffer.
* of idxes into the circular buffer.
*
* Rx Queue Indexes
* The host/firmware share two index registers for managing the Rx buffers.
* The host/firmware share two idx registers for managing the Rx buffers.
*
* The READ index maps to the first position that the firmware may be writing
* The READ idx maps to the first position that the firmware may be writing
* to -- the driver can read up to (but not including) this position and get
* good data.
* The READ index is managed by the firmware once the card is enabled.
* The READ idx is managed by the firmware once the card is enabled.
*
* The WRITE index maps to the last position the driver has read from -- the
* The WRITE idx maps to the last position the driver has read from -- the
* position preceding WRITE is the last slot the firmware can place a packet.
*
* The queue is empty (no good data) if WRITE = READ - 1, and is full if
......@@ -64,9 +64,9 @@
* During initialization, the host sets up the READ queue position to the first
* IDX position, and WRITE to the last (READ - 1 wrapped)
*
* When the firmware places a packet in a buffer, it will advance the READ index
* and fire the RX interrupt. The driver can then query the READ index and
* process as many packets as possible, moving the WRITE index forward as it
* When the firmware places a packet in a buffer, it will advance the READ idx
* and fire the RX interrupt. The driver can then query the READ idx and
* process as many packets as possible, moving the WRITE idx forward as it
* resets the Rx queue buffers with new memory.
*
* The management in the driver is as follows:
......@@ -75,9 +75,9 @@
* to replenish the iwl->rxq->rx_free.
* + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
* iwl->rxq is replenished and the READ IDX is updated (updating the
* 'processed' and 'read' driver indexes as well)
* 'processed' and 'read' driver idxes as well)
* + A received packet is processed and handed to the kernel network stack,
* detached from the iwl->rxq. The driver 'processed' index is updated.
* detached from the iwl->rxq. The driver 'processed' idx is updated.
* + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
* list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
* IDX is not incremented and iwl->status(RX_STALLED) is set. If there
......@@ -91,7 +91,7 @@
* il_rx_queue_restock
* il_rx_queue_restock() Moves available buffers from rx_free into Rx
* queue, updates firmware pointers, and updates
* the WRITE index. If insufficient rx_free buffers
* the WRITE idx. If insufficient rx_free buffers
* are available, schedules il_rx_replenish
*
* -- enable interrupts --
......
......@@ -174,7 +174,7 @@ int il_send_add_sta(struct il_priv *il,
}
EXPORT_SYMBOL(il_send_add_sta);
static void il_set_ht_add_station(struct il_priv *il, u8 index,
static void il_set_ht_add_station(struct il_priv *il, u8 idx,
struct ieee80211_sta *sta,
struct il_rxon_context *ctx)
{
......@@ -192,7 +192,7 @@ static void il_set_ht_add_station(struct il_priv *il, u8 index,
(mimo_ps_mode == WLAN_HT_CAP_SM_PS_DYNAMIC) ?
"dynamic" : "disabled");
sta_flags = il->stations[index].sta.station_flags;
sta_flags = il->stations[idx].sta.station_flags;
sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
......@@ -221,7 +221,7 @@ static void il_set_ht_add_station(struct il_priv *il, u8 index,
else
sta_flags &= ~STA_FLG_HT40_EN_MSK;
il->stations[index].sta.station_flags = sta_flags;
il->stations[idx].sta.station_flags = sta_flags;
done:
return;
}
......@@ -649,7 +649,7 @@ il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx)
}
EXPORT_SYMBOL(il_restore_stations);
int il_get_free_ucode_key_index(struct il_priv *il)
int il_get_free_ucode_key_idx(struct il_priv *il)
{
int i;
......@@ -659,7 +659,7 @@ int il_get_free_ucode_key_index(struct il_priv *il)
return WEP_INVALID_OFFSET;
}
EXPORT_SYMBOL(il_get_free_ucode_key_index);
EXPORT_SYMBOL(il_get_free_ucode_key_idx);
void il_dealloc_bcast_stations(struct il_priv *il)
{
......@@ -692,7 +692,7 @@ static void il_dump_lq_cmd(struct il_priv *il,
lq->general_params.dual_stream_ant_msk);
for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
D_RATE("lq index %d 0x%X\n",
D_RATE("lq idx %d 0x%X\n",
i, lq->rs_table[i].rate_n_flags);
}
#else
......@@ -728,7 +728,7 @@ static bool il_is_lq_table_valid(struct il_priv *il,
if (le32_to_cpu(lq->rs_table[i].rate_n_flags) &
RATE_MCS_HT_MSK) {
D_INFO(
"index %d of LQ expects HT channel\n",
"idx %d of LQ expects HT channel\n",
i);
return false;
}
......
......@@ -48,7 +48,7 @@ void il_restore_stations(struct il_priv *il,
void il_clear_ucode_stations(struct il_priv *il,
struct il_rxon_context *ctx);
void il_dealloc_bcast_stations(struct il_priv *il);
int il_get_free_ucode_key_index(struct il_priv *il);
int il_get_free_ucode_key_idx(struct il_priv *il);
int il_send_add_sta(struct il_priv *il,
struct il_addsta_cmd *sta, u8 flags);
int il_add_station_common(struct il_priv *il,
......
......@@ -39,7 +39,7 @@
#include "iwl-helpers.h"
/**
* il_txq_update_write_ptr - Send new write index to hardware
* il_txq_update_write_ptr - Send new write idx to hardware
*/
void
il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
......@@ -152,7 +152,7 @@ void il_cmd_queue_unmap(struct il_priv *il)
return;
while (q->read_ptr != q->write_ptr) {
i = il_get_cmd_index(q, q->read_ptr, 0);
i = il_get_cmd_idx(q, q->read_ptr, 0);
if (txq->meta[i].flags & CMD_MAPPED) {
pci_unmap_single(il->pci_dev,
......@@ -254,7 +254,7 @@ EXPORT_SYMBOL(il_queue_space);
/**
* il_queue_init - Initialize queue's high/low-water and read/write indexes
* il_queue_init - Initialize queue's high/low-water and read/write idxes
*/
static int il_queue_init(struct il_priv *il, struct il_queue *q,
int count, int slots_num, u32 id)
......@@ -268,7 +268,7 @@ static int il_queue_init(struct il_priv *il, struct il_queue *q,
BUG_ON(!is_power_of_2(count));
/* slots_num must be power-of-two size, otherwise
* il_get_cmd_index is broken. */
* il_get_cmd_idx is broken. */
BUG_ON(!is_power_of_2(slots_num));
q->low_mark = q->n_win / 4;
......@@ -385,7 +385,7 @@ int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq,
* il_queue_inc_wrap and il_queue_dec_wrap are broken. */
BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
/* Initialize queue's high/low-water marks, and head/tail indexes */
/* Initialize queue's high/low-water marks, and head/tail idxes */
il_queue_init(il, &txq->q,
TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
......@@ -416,7 +416,7 @@ void il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq,
txq->need_update = 0;
/* Initialize queue's high/low-water marks, and head/tail indexes */
/* Initialize queue's high/low-water marks, and head/tail idxes */
il_queue_init(il, &txq->q,
TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
......@@ -433,7 +433,7 @@ EXPORT_SYMBOL(il_tx_queue_reset);
* @cmd: a point to the ucode command structure
*
* The function returns < 0 values to indicate the operation is
* failed. On success, it turns the index (> 0) of command in the
* failed. On success, it turns the idx (> 0) of command in the
* command queue.
*/
int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
......@@ -476,7 +476,7 @@ int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
return -ENOSPC;
}
idx = il_get_cmd_index(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
out_cmd = txq->cmd[idx];
out_meta = &txq->meta[idx];
......@@ -543,7 +543,7 @@ int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
phys_addr, fix_size, 1,
U32_PAD(cmd->len));
/* Increment and update queue's write index */
/* Increment and update queue's write idx */
q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
il_txq_update_write_ptr(il, txq);
......@@ -554,7 +554,7 @@ int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
/**
* il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
*
* When FW advances 'R' index, all entries between old and new 'R' index
* When FW advances 'R' idx, all entries between old and new 'R' idx
* need to be reclaimed. As result, some free space forms. If there is
* enough free space (> low mark), wake the stack that feeds us.
*/
......@@ -566,7 +566,7 @@ static void il_hcmd_queue_reclaim(struct il_priv *il, int txq_id,
int nfreed = 0;
if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
IL_ERR("Read index for DMA queue txq id (%d), index %d, "
IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
"is out of range [0-%d] %d %d.\n", txq_id,
idx, q->n_bd, q->write_ptr, q->read_ptr);
return;
......@@ -576,7 +576,7 @@ static void il_hcmd_queue_reclaim(struct il_priv *il, int txq_id,
q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
if (nfreed++ > 0) {
IL_ERR("HCMD skipped: index (%d) %d %d\n", idx,
IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
q->write_ptr, q->read_ptr);
queue_work(il->workqueue, &il->restart);
}
......@@ -598,8 +598,8 @@ il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
struct il_rx_pkt *pkt = rxb_addr(rxb);
u16 sequence = le16_to_cpu(pkt->hdr.sequence);
int txq_id = SEQ_TO_QUEUE(sequence);
int index = SEQ_TO_IDX(sequence);
int cmd_index;
int idx = SEQ_TO_IDX(sequence);
int cmd_idx;
bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
struct il_device_cmd *cmd;
struct il_cmd_meta *meta;
......@@ -618,9 +618,9 @@ il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
return;
}
cmd_index = il_get_cmd_index(&txq->q, index, huge);
cmd = txq->cmd[cmd_index];
meta = &txq->meta[cmd_index];
cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
cmd = txq->cmd[cmd_idx];
meta = &txq->meta[cmd_idx];
txq->time_stamp = jiffies;
......@@ -638,7 +638,7 @@ il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
spin_lock_irqsave(&il->hcmd_lock, flags);
il_hcmd_queue_reclaim(il, txq_id, index, cmd_index);
il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
if (!(meta->flags & CMD_ASYNC)) {
clear_bit(STATUS_HCMD_ACTIVE, &il->status);
......
......@@ -163,7 +163,7 @@ static int il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
== STA_KEY_FLG_NO_ENC)
il->stations[sta_id].sta.key.key_offset =
il_get_free_ucode_key_index(il);
il_get_free_ucode_key_idx(il);
/* else, we are overriding an existing key => no need to allocated room
* in uCode. */
......@@ -513,7 +513,7 @@ static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb)
hdr_len = ieee80211_hdrlen(fc);
/* Find index into station table for destination station */
/* Find idx into station table for destination station */
sta_id = il_sta_id_or_broadcast(
il, &il->ctx,
info->control.sta);
......@@ -541,7 +541,7 @@ static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb)
spin_lock_irqsave(&il->lock, flags);
idx = il_get_cmd_index(q, q->write_ptr, 0);
idx = il_get_cmd_idx(q, q->write_ptr, 0);
/* Set up driver data for this TFD */
memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct il_tx_info));
......@@ -557,7 +557,7 @@ static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb)
/*
* Set up the Tx-command (not MAC!) header.
* Store the chosen Tx queue and TFD index within the sequence field;
* Store the chosen Tx queue and TFD idx within the sequence field;
* after Tx, uCode's Tx response will return this value so driver can
* locate the frame within the tx queue and do post-tx processing.
*/
......@@ -641,7 +641,7 @@ static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb)
}
/* Tell device the write index *just past* this latest filled TFD */
/* Tell device the write idx *just past* this latest filled TFD */
q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
il_txq_update_write_ptr(il, txq);
spin_unlock_irqrestore(&il->lock, flags);
......@@ -889,14 +889,14 @@ static void il3945_setup_rx_handlers(struct il_priv *il)
* 0 to 31
*
* Rx Queue Indexes
* The host/firmware share two index registers for managing the Rx buffers.
* The host/firmware share two idx registers for managing the Rx buffers.
*
* The READ index maps to the first position that the firmware may be writing
* The READ idx maps to the first position that the firmware may be writing
* to -- the driver can read up to (but not including) this position and get
* good data.
* The READ index is managed by the firmware once the card is enabled.
* The READ idx is managed by the firmware once the card is enabled.
*
* The WRITE index maps to the last position the driver has read from -- the
* The WRITE idx maps to the last position the driver has read from -- the
* position preceding WRITE is the last slot the firmware can place a packet.
*
* The queue is empty (no good data) if WRITE = READ - 1, and is full if
......@@ -905,9 +905,9 @@ static void il3945_setup_rx_handlers(struct il_priv *il)
* During initialization, the host sets up the READ queue position to the first
* IDX position, and WRITE to the last (READ - 1 wrapped)
*
* When the firmware places a packet in a buffer, it will advance the READ index
* and fire the RX interrupt. The driver can then query the READ index and
* process as many packets as possible, moving the WRITE index forward as it
* When the firmware places a packet in a buffer, it will advance the READ idx
* and fire the RX interrupt. The driver can then query the READ idx and
* process as many packets as possible, moving the WRITE idx forward as it
* resets the Rx queue buffers with new memory.
*
* The management in the driver is as follows:
......@@ -916,9 +916,9 @@ static void il3945_setup_rx_handlers(struct il_priv *il)
* to replenish the iwl->rxq->rx_free.
* + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
* iwl->rxq is replenished and the READ IDX is updated (updating the
* 'processed' and 'read' driver indexes as well)
* 'processed' and 'read' driver idxes as well)
* + A received packet is processed and handed to the kernel network stack,
* detached from the iwl->rxq. The driver 'processed' index is updated.
* detached from the iwl->rxq. The driver 'processed' idx is updated.
* + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
* list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
* IDX is not incremented and iwl->status(RX_STALLED) is set. If there
......@@ -931,7 +931,7 @@ static void il3945_setup_rx_handlers(struct il_priv *il)
* il3945_rx_queue_restock
* il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
* queue, updates firmware pointers, and updates
* the WRITE index. If insufficient rx_free buffers
* the WRITE idx. If insufficient rx_free buffers
* are available, schedules il3945_rx_replenish
*
* -- enable interrupts --
......@@ -960,7 +960,7 @@ static inline __le32 il3945_dma_addr2rbd_ptr(struct il_priv *il,
* and we have free pre-allocated buffers, fill the ranks as much
* as we can, pulling from rx_free.
*
* This moves the 'write' index forward to catch up with 'processed', and
* This moves the 'write' idx forward to catch up with 'processed', and
* also updates the memory address in the firmware to reference the new
* target buffer.
*/
......@@ -1211,7 +1211,7 @@ static void il3945_rx_handle(struct il_priv *il)
u32 count = 8;
int total_empty = 0;
/* uCode's read index (stored in shared DRAM) indicates the last Rx
/* uCode's read idx (stored in shared DRAM) indicates the last Rx
* buffer that the driver may process (last buffer filled by ucode). */
r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
i = rxq->read;
......@@ -1656,7 +1656,7 @@ static void il3945_init_hw_rates(struct il_priv *il,
for (i = 0; i < RATE_COUNT_LEGACY; i++) {
rates[i].bitrate = il3945_rates[i].ieee * 5;
rates[i].hw_value = i; /* Rate scaling will work on indexes */
rates[i].hw_value = i; /* Rate scaling will work on idxes */
rates[i].hw_value_short = i;
rates[i].flags = 0;
if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
......@@ -1850,7 +1850,7 @@ IL3945_UCODE_GET(boot_size);
static int il3945_read_ucode(struct il_priv *il)
{
const struct il_ucode_header *ucode;
int ret = -EINVAL, index;
int ret = -EINVAL, idx;
const struct firmware *ucode_raw;
/* firmware file name contains uCode/driver compatibility version */
const char *name_pre = il->cfg->fw_name_pre;
......@@ -1863,8 +1863,8 @@ static int il3945_read_ucode(struct il_priv *il)
/* Ask kernel firmware_class module to get the boot firmware off disk.
* request_firmware() is synchronous, file is in memory on return. */
for (index = api_max; index >= api_min; index--) {
sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
for (idx = api_max; idx >= api_min; idx--) {
sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
if (ret < 0) {
IL_ERR("%s firmware file req failed: %d\n",
......@@ -1874,7 +1874,7 @@ static int il3945_read_ucode(struct il_priv *il)
else
goto error;
} else {
if (index < api_max)
if (idx < api_max)
IL_ERR("Loaded firmware %s, "
"which is deprecated. "
" Please use API v%u instead.\n",
......
......@@ -173,7 +173,7 @@ static void il4965_set_beacon_tim(struct il_priv *il,
struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
/*
* The index is relative to frame start but we start looking at the
* The idx is relative to frame start but we start looking at the
* variable-length part of the beacon.
*/
tim_idx = mgmt->u.beacon.variable - beacon;
......@@ -318,7 +318,7 @@ static inline u8 il4965_tfd_get_num_tbs(struct il_tfd *tfd)
* @il - driver ilate data
* @txq - tx queue
*
* Does NOT advance any TFD circular buffer read/write indexes
* Does NOT advance any TFD circular buffer read/write idxes
* Does NOT free the TFD itself (which is within circular buffer)
*/
void il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
......@@ -326,11 +326,11 @@ void il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
struct il_tfd *tfd_tmp = (struct il_tfd *)txq->tfds;
struct il_tfd *tfd;
struct pci_dev *dev = il->pci_dev;
int index = txq->q.read_ptr;
int idx = txq->q.read_ptr;
int i;
int num_tbs;
tfd = &tfd_tmp[index];
tfd = &tfd_tmp[idx];
/* Sanity check on number of chunks */
num_tbs = il4965_tfd_get_num_tbs(tfd);
......@@ -344,8 +344,8 @@ void il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
/* Unmap tx_cmd */
if (num_tbs)
pci_unmap_single(dev,
dma_unmap_addr(&txq->meta[index], mapping),
dma_unmap_len(&txq->meta[index], len),
dma_unmap_addr(&txq->meta[idx], mapping),
dma_unmap_len(&txq->meta[idx], len),
PCI_DMA_BIDIRECTIONAL);
/* Unmap chunks, if any. */
......@@ -643,7 +643,7 @@ void il4965_rx_handle(struct il_priv *il)
u32 count = 8;
int total_empty;
/* uCode's read index (stored in shared DRAM) indicates the last Rx
/* uCode's read idx (stored in shared DRAM) indicates the last Rx
* buffer that the driver may process (last buffer filled by ucode). */
r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
i = rxq->read;
......@@ -1106,14 +1106,14 @@ static int __must_check il4965_request_firmware(struct il_priv *il, bool first)
char tag[8];
if (first) {
il->fw_index = il->cfg->ucode_api_max;
sprintf(tag, "%d", il->fw_index);
il->fw_idx = il->cfg->ucode_api_max;
sprintf(tag, "%d", il->fw_idx);
} else {
il->fw_index--;
sprintf(tag, "%d", il->fw_index);
il->fw_idx--;
sprintf(tag, "%d", il->fw_idx);
}
if (il->fw_index < il->cfg->ucode_api_min) {
if (il->fw_idx < il->cfg->ucode_api_min) {
IL_ERR("no suitable firmware found!\n");
return -ENOENT;
}
......@@ -1213,7 +1213,7 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
memset(&pieces, 0, sizeof(pieces));
if (!ucode_raw) {
if (il->fw_index <= il->cfg->ucode_api_max)
if (il->fw_idx <= il->cfg->ucode_api_max)
IL_ERR(
"request for firmware file '%s' failed.\n",
il->firmware_name);
......@@ -1655,7 +1655,7 @@ static int il4965_alive_notify(struct il_priv *il)
/* Initialize each Tx queue (including the command queue) */
for (i = 0; i < il->hw_params.max_txq_num; i++) {
/* TFD circular buffer read/write indexes */
/* TFD circular buffer read/write idxes */
il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(i), 0);
il_wr(il, HBUS_TARG_WRPTR, 0 | (i << 8));
......@@ -2713,7 +2713,7 @@ static void il4965_init_hw_rates(struct il_priv *il,
for (i = 0; i < RATE_COUNT_LEGACY; i++) {
rates[i].bitrate = il_rates[i].ieee * 5;
rates[i].hw_value = i; /* Rate scaling will work on indexes */
rates[i].hw_value = i; /* Rate scaling will work on idxes */
rates[i].hw_value_short = i;
rates[i].flags = 0;
if ((i >= IL_FIRST_CCK_RATE) && (i <= IL_LAST_CCK_RATE)) {
......@@ -2729,11 +2729,11 @@ static void il4965_init_hw_rates(struct il_priv *il,
/*
* Acquire il->lock before calling this function !
*/
void il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 index)
void il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 idx)
{
il_wr(il, HBUS_TARG_WRPTR,
(index & 0xff) | (txq_id << 8));
il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(txq_id), index);
(idx & 0xff) | (txq_id << 8));
il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(txq_id), idx);
}
void il4965_tx_queue_set_status(struct il_priv *il,
......
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