Commit 0cdab21f authored by Chris Wilson's avatar Chris Wilson

drm/i915: Uncouple render/power ctx before suspending

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 9b3826bf
......@@ -820,6 +820,8 @@ int i915_save_state(struct drm_device *dev)
if (HAS_PCH_SPLIT(dev))
ironlake_disable_drps(dev);
intel_disable_clock_gating(dev);
/* Cache mode state */
dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
......@@ -863,7 +865,7 @@ int i915_restore_state(struct drm_device *dev)
}
/* Clock gating state */
intel_init_clock_gating(dev);
intel_enable_clock_gating(dev);
if (HAS_PCH_SPLIT(dev)) {
ironlake_enable_drps(dev);
......
......@@ -5828,7 +5828,7 @@ void intel_init_emon(struct drm_device *dev)
dev_priv->corr = (lcfuse & LCFUSE_HIV_MASK);
}
void intel_init_clock_gating(struct drm_device *dev)
void intel_enable_clock_gating(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
......@@ -5985,6 +5985,33 @@ void intel_init_clock_gating(struct drm_device *dev)
}
}
void intel_disable_clock_gating(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
if (dev_priv->renderctx) {
struct drm_i915_gem_object *obj = dev_priv->renderctx;
I915_WRITE(CCID, 0);
POSTING_READ(CCID);
i915_gem_object_unpin(obj);
drm_gem_object_unreference(&obj->base);
dev_priv->renderctx = NULL;
}
if (dev_priv->pwrctx) {
struct drm_i915_gem_object *obj = dev_priv->pwrctx;
I915_WRITE(PWRCTXA, 0);
POSTING_READ(PWRCTXA);
i915_gem_object_unpin(obj);
drm_gem_object_unreference(&obj->base);
dev_priv->pwrctx = NULL;
}
}
/* Set up chip specific display functions */
static void intel_init_display(struct drm_device *dev)
{
......@@ -6211,7 +6238,7 @@ void intel_modeset_init(struct drm_device *dev)
intel_setup_outputs(dev);
intel_init_clock_gating(dev);
intel_enable_clock_gating(dev);
/* Just disable it once at startup */
i915_disable_vga(dev);
......@@ -6252,31 +6279,11 @@ void intel_modeset_cleanup(struct drm_device *dev)
if (dev_priv->display.disable_fbc)
dev_priv->display.disable_fbc(dev);
if (dev_priv->renderctx) {
struct drm_i915_gem_object *obj = dev_priv->renderctx;
I915_WRITE(CCID, obj->gtt_offset &~ CCID_EN);
POSTING_READ(CCID);
i915_gem_object_unpin(obj);
drm_gem_object_unreference(&obj->base);
dev_priv->renderctx = NULL;
}
if (dev_priv->pwrctx) {
struct drm_i915_gem_object *obj = dev_priv->pwrctx;
I915_WRITE(PWRCTXA, obj->gtt_offset &~ PWRCTX_EN);
POSTING_READ(PWRCTXA);
i915_gem_object_unpin(obj);
drm_gem_object_unreference(&obj->base);
dev_priv->pwrctx = NULL;
}
if (IS_IRONLAKE_M(dev))
ironlake_disable_drps(dev);
intel_disable_clock_gating(dev);
mutex_unlock(&dev->struct_mutex);
/* Disable the irq before mode object teardown, for the irq might
......
......@@ -294,7 +294,8 @@ extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
u16 blue, int regno);
extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
u16 *blue, int regno);
extern void intel_init_clock_gating(struct drm_device *dev);
extern void intel_enable_clock_gating(struct drm_device *dev);
extern void intel_disable_clock_gating(struct drm_device *dev);
extern void ironlake_enable_drps(struct drm_device *dev);
extern void ironlake_disable_drps(struct drm_device *dev);
extern void intel_init_emon(struct drm_device *dev);
......
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