Commit 0e03aca2 authored by Radhey Shyam Pandey's avatar Radhey Shyam Pandey Committed by Vinod Koul

dmaengine: xilinx_dma: Fix 64-bit simple CDMA transfer

In AXI CDMA simple mode also pass MSB bits of source and destination
address to xilinx_write function. This fixes simple CDMA operation
mode using 64-bit addressing.
Signed-off-by: default avatarRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
Reviewed-by: default avatarAppana Durga Kedareswara Rao <appana.durga.rao@xilinx.com>
Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 4e47d24a
......@@ -1247,8 +1247,10 @@ static void xilinx_cdma_start_transfer(struct xilinx_dma_chan *chan)
hw = &segment->hw;
xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, hw->src_addr);
xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, hw->dest_addr);
xilinx_write(chan, XILINX_CDMA_REG_SRCADDR,
xilinx_prep_dma_addr_t(hw->src_addr));
xilinx_write(chan, XILINX_CDMA_REG_DSTADDR,
xilinx_prep_dma_addr_t(hw->dest_addr));
/* Start the transfer */
dma_ctrl_write(chan, XILINX_DMA_REG_BTT,
......
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