Commit 0ec2c0f8 authored by Eugenia Emantayev's avatar Eugenia Emantayev Committed by David S. Miller

mlx4: Traffic steering management support for SRIOV

Let multicast/unicast attaching flow go through resource tracker.
The PF is the one responsible for managing all the steering entries.
Define and use module parameter that determines the number of qps
per multicast group.
Minor changes in function calls according to changed prototype.
Signed-off-by: default avatarEugenia Emantayev <eugenia@mellanox.co.il>
Signed-off-by: default avatarYevgeny Petrilin <yevgenyp@mellanox.co.il>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 8e59d254
...@@ -996,6 +996,15 @@ static struct mlx4_cmd_info cmd_info[] = { ...@@ -996,6 +996,15 @@ static struct mlx4_cmd_info cmd_info[] = {
.verify = NULL, .verify = NULL,
.wrapper = mlx4_QP_ATTACH_wrapper .wrapper = mlx4_QP_ATTACH_wrapper
}, },
{
.opcode = MLX4_CMD_PROMISC,
.has_inbox = false,
.has_outbox = false,
.out_is_imm = false,
.encode_slave_id = false,
.verify = NULL,
.wrapper = mlx4_PROMISC_wrapper
},
{ {
.opcode = MLX4_CMD_INFORM_FLR_DONE, .opcode = MLX4_CMD_INFORM_FLR_DONE,
.has_inbox = false, .has_inbox = false,
......
...@@ -75,6 +75,14 @@ MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero"); ...@@ -75,6 +75,14 @@ MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
#endif /* CONFIG_PCI_MSI */ #endif /* CONFIG_PCI_MSI */
int mlx4_log_num_mgm_entry_size = 10;
module_param_named(log_num_mgm_entry_size,
mlx4_log_num_mgm_entry_size, int, 0444);
MODULE_PARM_DESC(log_num_mgm_entry_size, "log mgm size, that defines the num"
" of qp per mcg, for example:"
" 10 gives 248.range: 9<="
" log_num_mgm_entry_size <= 12");
static char mlx4_version[] __devinitdata = static char mlx4_version[] __devinitdata =
DRV_NAME ": Mellanox ConnectX core driver v" DRV_NAME ": Mellanox ConnectX core driver v"
DRV_VERSION " (" DRV_RELDATE ")\n"; DRV_VERSION " (" DRV_RELDATE ")\n";
...@@ -205,7 +213,7 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) ...@@ -205,7 +213,7 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
dev->caps.reserved_srqs = dev_cap->reserved_srqs; dev->caps.reserved_srqs = dev_cap->reserved_srqs;
dev->caps.max_sq_desc_sz = dev_cap->max_sq_desc_sz; dev->caps.max_sq_desc_sz = dev_cap->max_sq_desc_sz;
dev->caps.max_rq_desc_sz = dev_cap->max_rq_desc_sz; dev->caps.max_rq_desc_sz = dev_cap->max_rq_desc_sz;
dev->caps.num_qp_per_mgm = MLX4_QP_PER_MGM; dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev);
/* /*
* Subtract 1 from the limit because we need to allocate a * Subtract 1 from the limit because we need to allocate a
* spare CQE so the HCA HW can tell the difference between an * spare CQE so the HCA HW can tell the difference between an
...@@ -648,7 +656,8 @@ static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap, ...@@ -648,7 +656,8 @@ static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
* and it's a lot easier than trying to track ref counts. * and it's a lot easier than trying to track ref counts.
*/ */
err = mlx4_init_icm_table(dev, &priv->mcg_table.table, err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
init_hca->mc_base, MLX4_MGM_ENTRY_SIZE, init_hca->mc_base,
mlx4_get_mgm_entry_size(dev),
dev->caps.num_mgms + dev->caps.num_amgms, dev->caps.num_mgms + dev->caps.num_amgms,
dev->caps.num_mgms + dev->caps.num_amgms, dev->caps.num_mgms + dev->caps.num_amgms,
0, 0); 0, 0);
......
This diff is collapsed.
...@@ -61,9 +61,9 @@ enum { ...@@ -61,9 +61,9 @@ enum {
}; };
enum { enum {
MLX4_MGM_ENTRY_SIZE = 0x100, MLX4_MAX_MGM_ENTRY_SIZE = 0x1000,
MLX4_QP_PER_MGM = 4 * (MLX4_MGM_ENTRY_SIZE / 16 - 2), MLX4_MAX_QP_PER_MGM = 4 * (MLX4_MAX_MGM_ENTRY_SIZE / 16 - 2),
MLX4_MTT_ENTRY_PER_SEG = 8 MLX4_MTT_ENTRY_PER_SEG = 8,
}; };
enum { enum {
...@@ -190,6 +190,8 @@ do { \ ...@@ -190,6 +190,8 @@ do { \
#define mlx4_warn(mdev, format, arg...) \ #define mlx4_warn(mdev, format, arg...) \
dev_warn(&mdev->pdev->dev, format, ##arg) dev_warn(&mdev->pdev->dev, format, ##arg)
extern int mlx4_log_num_mgm_entry_size;
#define MLX4_MAX_NUM_SLAVES (MLX4_MAX_NUM_PF + MLX4_MAX_NUM_VF) #define MLX4_MAX_NUM_SLAVES (MLX4_MAX_NUM_PF + MLX4_MAX_NUM_VF)
#define ALL_SLAVES 0xff #define ALL_SLAVES 0xff
...@@ -417,9 +419,6 @@ struct mlx4_comm { ...@@ -417,9 +419,6 @@ struct mlx4_comm {
u32 slave_read; u32 slave_read;
}; };
#define MGM_QPN_MASK 0x00FFFFFF
#define MGM_BLCK_LB_BIT 30
#define VLAN_FLTR_SIZE 128 #define VLAN_FLTR_SIZE 128
struct mlx4_vlan_fltr { struct mlx4_vlan_fltr {
...@@ -437,14 +436,6 @@ struct mlx4_steer_index { ...@@ -437,14 +436,6 @@ struct mlx4_steer_index {
struct list_head duplicates; struct list_head duplicates;
}; };
struct mlx4_mgm {
__be32 next_gid_index;
__be32 members_count;
u32 reserved[2];
u8 gid[16];
__be32 qp[MLX4_QP_PER_MGM];
};
struct mlx4_slave_state { struct mlx4_slave_state {
u8 comm_toggle; u8 comm_toggle;
u8 last_cmd; u8 last_cmd;
...@@ -1021,6 +1012,9 @@ int mlx4_QUERY_IF_STAT_wrapper(struct mlx4_dev *dev, int slave, ...@@ -1021,6 +1012,9 @@ int mlx4_QUERY_IF_STAT_wrapper(struct mlx4_dev *dev, int slave,
struct mlx4_cmd_mailbox *outbox, struct mlx4_cmd_mailbox *outbox,
struct mlx4_cmd_info *cmd); struct mlx4_cmd_info *cmd);
int mlx4_get_mgm_entry_size(struct mlx4_dev *dev);
int mlx4_get_qp_per_mgm(struct mlx4_dev *dev);
static inline void set_param_l(u64 *arg, u32 val) static inline void set_param_l(u64 *arg, u32 val)
{ {
*((u32 *)arg) = val; *((u32 *)arg) = val;
......
...@@ -99,7 +99,7 @@ u64 mlx4_make_profile(struct mlx4_dev *dev, ...@@ -99,7 +99,7 @@ u64 mlx4_make_profile(struct mlx4_dev *dev,
profile[MLX4_RES_DMPT].size = dev_cap->dmpt_entry_sz; profile[MLX4_RES_DMPT].size = dev_cap->dmpt_entry_sz;
profile[MLX4_RES_CMPT].size = dev_cap->cmpt_entry_sz; profile[MLX4_RES_CMPT].size = dev_cap->cmpt_entry_sz;
profile[MLX4_RES_MTT].size = dev->caps.mtts_per_seg * dev_cap->mtt_entry_sz; profile[MLX4_RES_MTT].size = dev->caps.mtts_per_seg * dev_cap->mtt_entry_sz;
profile[MLX4_RES_MCG].size = MLX4_MGM_ENTRY_SIZE; profile[MLX4_RES_MCG].size = mlx4_get_mgm_entry_size(dev);
profile[MLX4_RES_QP].num = request->num_qp; profile[MLX4_RES_QP].num = request->num_qp;
profile[MLX4_RES_RDMARC].num = request->num_qp * request->rdmarc_per_qp; profile[MLX4_RES_RDMARC].num = request->num_qp * request->rdmarc_per_qp;
...@@ -218,7 +218,8 @@ u64 mlx4_make_profile(struct mlx4_dev *dev, ...@@ -218,7 +218,8 @@ u64 mlx4_make_profile(struct mlx4_dev *dev,
dev->caps.num_mgms = profile[i].num >> 1; dev->caps.num_mgms = profile[i].num >> 1;
dev->caps.num_amgms = profile[i].num >> 1; dev->caps.num_amgms = profile[i].num >> 1;
init_hca->mc_base = profile[i].start; init_hca->mc_base = profile[i].start;
init_hca->log_mc_entry_sz = ilog2(MLX4_MGM_ENTRY_SIZE); init_hca->log_mc_entry_sz =
ilog2(mlx4_get_mgm_entry_size(dev));
init_hca->log_mc_table_sz = profile[i].log_num; init_hca->log_mc_table_sz = profile[i].log_num;
init_hca->log_mc_hash_sz = profile[i].log_num - 1; init_hca->log_mc_hash_sz = profile[i].log_num - 1;
break; break;
......
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