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Commit 0fc64cc0 authored by Magnus Damm's avatar Magnus Damm Committed by Paul Mundt
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sh: lockless gpio_get_value() 

This patch separates the register read and write functions to
allow lockless gpio_get_value().
Signed-off-by: default avatarMagnus Damm <damm@igel.co.jp>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 18801be7
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Showing with 63 additions and 63 deletions
arch/sh/kernel/gpio.c
View file @ 0fc64cc0
...@@ -46,9 +46,8 @@ static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r) ...@@ -46,9 +46,8 @@ static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
return 1; return 1;
} }
static int read_write_reg(unsigned long reg, unsigned long reg_width, static int gpio_read_reg(unsigned long reg, unsigned long reg_width,
unsigned long field_width, unsigned long in_pos, unsigned long field_width, unsigned long in_pos)
unsigned long value, int do_write)
{ {
unsigned long data, mask, pos; unsigned long data, mask, pos;
...@@ -57,10 +56,9 @@ static int read_write_reg(unsigned long reg, unsigned long reg_width, ...@@ -57,10 +56,9 @@ static int read_write_reg(unsigned long reg, unsigned long reg_width,
pos = reg_width - ((in_pos + 1) * field_width); pos = reg_width - ((in_pos + 1) * field_width);
#ifdef DEBUG #ifdef DEBUG
pr_info("%s, addr = %lx, value = %ld, pos = %ld, " pr_info("read_reg: addr = %lx, pos = %ld, "
"r_width = %ld, f_width = %ld\n", "r_width = %ld, f_width = %ld\n",
do_write ? "write" : "read", reg, value, pos, reg, pos, reg_width, field_width);
reg_width, field_width);
#endif #endif
switch (reg_width) { switch (reg_width) {
...@@ -75,24 +73,38 @@ static int read_write_reg(unsigned long reg, unsigned long reg_width, ...@@ -75,24 +73,38 @@ static int read_write_reg(unsigned long reg, unsigned long reg_width,
break; break;
} }
if (!do_write) return (data >> pos) & mask;
return (data >> pos) & mask; }
static void gpio_write_reg(unsigned long reg, unsigned long reg_width,
unsigned long field_width, unsigned long in_pos,
unsigned long value)
{
unsigned long mask, pos;
mask = (1 << field_width) - 1;
pos = reg_width - ((in_pos + 1) * field_width);
data &= ~(mask << pos); #ifdef DEBUG
data |= value << pos; pr_info("write_reg addr = %lx, value = %ld, pos = %ld, "
"r_width = %ld, f_width = %ld\n",
reg, value, pos, reg_width, field_width);
#endif
mask = ~(mask << pos);
value = value << pos;
switch (reg_width) { switch (reg_width) {
case 8: case 8:
ctrl_outb(data, reg); ctrl_outb((ctrl_inb(reg) & mask) | value, reg);
break; break;
case 16: case 16:
ctrl_outw(data, reg); ctrl_outw((ctrl_inw(reg) & mask) | value, reg);
break; break;
case 32: case 32:
ctrl_outl(data, reg); ctrl_outl((ctrl_inl(reg) & mask) | value, reg);
break; break;
} }
return 0;
} }
static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio) static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio)
...@@ -205,9 +217,9 @@ static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio, ...@@ -205,9 +217,9 @@ static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
return -1; return -1;
} }
static int write_config_reg(struct pinmux_info *gpioc, static void write_config_reg(struct pinmux_info *gpioc,
struct pinmux_cfg_reg *crp, struct pinmux_cfg_reg *crp,
int index) int index)
{ {
unsigned long ncomb, pos, value; unsigned long ncomb, pos, value;
...@@ -215,8 +227,7 @@ static int write_config_reg(struct pinmux_info *gpioc, ...@@ -215,8 +227,7 @@ static int write_config_reg(struct pinmux_info *gpioc,
pos = index / ncomb; pos = index / ncomb;
value = index % ncomb; value = index % ncomb;
return read_write_reg(crp->reg, crp->reg_width, gpio_write_reg(crp->reg, crp->reg_width, crp->field_width, pos, value);
crp->field_width, pos, value, 1);
} }
static int check_config_reg(struct pinmux_info *gpioc, static int check_config_reg(struct pinmux_info *gpioc,
...@@ -229,8 +240,8 @@ static int check_config_reg(struct pinmux_info *gpioc, ...@@ -229,8 +240,8 @@ static int check_config_reg(struct pinmux_info *gpioc,
pos = index / ncomb; pos = index / ncomb;
value = index % ncomb; value = index % ncomb;
if (read_write_reg(crp->reg, crp->reg_width, if (gpio_read_reg(crp->reg, crp->reg_width,
crp->field_width, pos, 0, 0) == value) crp->field_width, pos) == value)
return 0; return 0;
return -1; return -1;
...@@ -238,8 +249,8 @@ static int check_config_reg(struct pinmux_info *gpioc, ...@@ -238,8 +249,8 @@ static int check_config_reg(struct pinmux_info *gpioc,
enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE }; enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio, static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
int pinmux_type, int cfg_mode) int pinmux_type, int cfg_mode)
{ {
struct pinmux_cfg_reg *cr = NULL; struct pinmux_cfg_reg *cr = NULL;
pinmux_enum_t enum_id; pinmux_enum_t enum_id;
...@@ -305,8 +316,7 @@ int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio, ...@@ -305,8 +316,7 @@ int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
break; break;
case GPIO_CFG_REQ: case GPIO_CFG_REQ:
if (write_config_reg(gpioc, cr, index) != 0) write_config_reg(gpioc, cr, index);
goto out_err;
*cntp = *cntp + 1; *cntp = *cntp + 1;
break; break;
...@@ -393,9 +403,12 @@ EXPORT_SYMBOL(gpio_free); ...@@ -393,9 +403,12 @@ EXPORT_SYMBOL(gpio_free);
static int pinmux_direction(struct pinmux_info *gpioc, static int pinmux_direction(struct pinmux_info *gpioc,
unsigned gpio, int new_pinmux_type) unsigned gpio, int new_pinmux_type)
{ {
int ret, pinmux_type; int pinmux_type;
int ret = -EINVAL;
if (!gpioc)
goto err_out;
ret = -EINVAL;
pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE; pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
switch (pinmux_type) { switch (pinmux_type) {
...@@ -433,68 +446,59 @@ int gpio_direction_input(unsigned gpio) ...@@ -433,68 +446,59 @@ int gpio_direction_input(unsigned gpio)
{ {
struct pinmux_info *gpioc = gpio_controller(gpio); struct pinmux_info *gpioc = gpio_controller(gpio);
unsigned long flags; unsigned long flags;
int ret = -EINVAL; int ret;
if (!gpioc)
goto err_out;
spin_lock_irqsave(&gpio_lock, flags); spin_lock_irqsave(&gpio_lock, flags);
ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_INPUT); ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_INPUT);
spin_unlock_irqrestore(&gpio_lock, flags); spin_unlock_irqrestore(&gpio_lock, flags);
err_out:
return ret; return ret;
} }
EXPORT_SYMBOL(gpio_direction_input); EXPORT_SYMBOL(gpio_direction_input);
static int __gpio_get_set_value(struct pinmux_info *gpioc, static void __gpio_set_value(struct pinmux_info *gpioc,
unsigned gpio, int value, unsigned gpio, int value)
int do_write)
{ {
struct pinmux_data_reg *dr = NULL; struct pinmux_data_reg *dr = NULL;
int bit = 0; int bit = 0;
if (get_data_reg(gpioc, gpio, &dr, &bit) != 0) if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
BUG(); BUG();
else else
value = read_write_reg(dr->reg, dr->reg_width, gpio_write_reg(dr->reg, dr->reg_width, 1, bit, !!value);
1, bit, !!value, do_write);
return value;
} }
int gpio_direction_output(unsigned gpio, int value) int gpio_direction_output(unsigned gpio, int value)
{ {
struct pinmux_info *gpioc = gpio_controller(gpio); struct pinmux_info *gpioc = gpio_controller(gpio);
unsigned long flags; unsigned long flags;
int ret = -EINVAL; int ret;
if (!gpioc)
goto err_out;
spin_lock_irqsave(&gpio_lock, flags); spin_lock_irqsave(&gpio_lock, flags);
__gpio_get_set_value(gpioc, gpio, value, 1); __gpio_set_value(gpioc, gpio, value);
ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_OUTPUT); ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_OUTPUT);
spin_unlock_irqrestore(&gpio_lock, flags); spin_unlock_irqrestore(&gpio_lock, flags);
err_out:
return ret; return ret;
} }
EXPORT_SYMBOL(gpio_direction_output); EXPORT_SYMBOL(gpio_direction_output);
int gpio_get_value(unsigned gpio) static int __gpio_get_value(struct pinmux_info *gpioc, unsigned gpio)
{ {
struct pinmux_info *gpioc = gpio_controller(gpio); struct pinmux_data_reg *dr = NULL;
unsigned long flags; int bit = 0;
int value = 0;
if (!gpioc) if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0) {
BUG(); BUG();
else { return 0;
spin_lock_irqsave(&gpio_lock, flags);
value = __gpio_get_set_value(gpioc, gpio, 0, 0);
spin_unlock_irqrestore(&gpio_lock, flags);
} }
return value; return gpio_read_reg(dr->reg, dr->reg_width, 1, bit);
}
int gpio_get_value(unsigned gpio)
{
return __gpio_get_value(gpio_controller(gpio), gpio);
} }
EXPORT_SYMBOL(gpio_get_value); EXPORT_SYMBOL(gpio_get_value);
...@@ -503,13 +507,9 @@ void gpio_set_value(unsigned gpio, int value) ...@@ -503,13 +507,9 @@ void gpio_set_value(unsigned gpio, int value)
struct pinmux_info *gpioc = gpio_controller(gpio); struct pinmux_info *gpioc = gpio_controller(gpio);
unsigned long flags; unsigned long flags;
if (!gpioc) spin_lock_irqsave(&gpio_lock, flags);
BUG(); __gpio_set_value(gpioc, gpio, value);
else { spin_unlock_irqrestore(&gpio_lock, flags);
spin_lock_irqsave(&gpio_lock, flags);
__gpio_get_set_value(gpioc, gpio, value, 1);
spin_unlock_irqrestore(&gpio_lock, flags);
}
} }
EXPORT_SYMBOL(gpio_set_value); EXPORT_SYMBOL(gpio_set_value);
......
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