Commit 10cea35a authored by Martin Dalecki's avatar Martin Dalecki Committed by Linus Torvalds

[PATCH] IDE 21

If I was to give this patch a name it would be:

"Vojtech Pavlik unleashed from the chains".

So credit where credit is due :-).

Anyway here follows the change log:

Mon Mar 11 23:48:28 CET 2002 ide-clean-21

- Swallow rewritten amd74xx host chip setup code from Vojtech Pavlik.  We can
   revert it easly if it turns out to be a bad thing. However the code looks
   quite sane to me. In esp. it doesn't containg that many magic numbers.

- Clean stale white spaces in ide-timing.h tirvial fix.

- Make ide_release_dma return void. It's value is never used anyway.

- Swallow more timing setup code cleanup by Vojtech Pavlik. Apply some
   cosmetics to it. Port opti621 to the new setup code.

- Kill abuse of ide_do_reset() on error return paths for atapi floppy tape and
   cd-rom devices. Just stop them. This gives better changes that defect
   removable media will not cause suddenly broken timings on hard discs
   containing system data! Even then comments in ide_do_reset() admit, that
   resetting the whole channel can have adverse effects on the second interface
   on this channel. And I have too frequently observed linux struggling on
   defect cd-rom for a far too long time to wish it to continue.

   Oh did I forget to say that the corresponding "how can I break my system fast
   and reliable" ioctl is gone as well?

   Removing it recovered the fact that the CONFIG_BLK_DEV_IDEDMA_TIMEOUT is
   completely bogous. I have removed this option therefore as well, because it's
   playing the same wrack havoc on the devices if enabled. This cat has been in
   an unfinished and *unfunctional* state anyway.

- Actually add physical suspend code to the power handling code.  Still the
   resume code isn't finished just jet. This is all subject to change at the
   point in time when we get to proper command queueing.
   I think however that Pavel will be interrested in tidding this bit up...

- Resync with 2.5.7-pre1.
parent a8723f35
......@@ -253,7 +253,6 @@ CONFIG_IDEDMA_PCI_AUTO=y
# CONFIG_IDEDMA_ONLYDISK is not set
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_PCI_WIP is not set
# CONFIG_BLK_DEV_IDEDMA_TIMEOUT is not set
# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_AEC62XX_TUNING is not set
......
......@@ -2,7 +2,7 @@
*
* Etrax specific IDE functions, like init and PIO-mode setting etc.
* Almost the entire ide.c is used for the rest of the Etrax ATA driver.
* Copyright (c) 2000, 2001 Axis Communications AB
* Copyright (c) 2000, 2001 Axis Communications AB
*
* Authors: Bjorn Wesen (initial version)
* Mikael Starvik (pio setup stuff)
......@@ -895,7 +895,14 @@ static int e100_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
/* ide.c calls this, but we don't need to do anything particular */
int ide_release_dma (ide_hwif_t *hwif)
/* Dear maintainer of this architecture please note that it would be a little
* more clever :-) to put this up into some header as static inline, so the
* spurious code below would just vanish.
*
* --- Marcin Dalecki
*/
void ide_release_dma (ide_hwif_t *hwif)
{
return 1;
/* empty */
}
......@@ -257,7 +257,6 @@ CONFIG_IDEDMA_PCI_AUTO=y
# CONFIG_IDEDMA_ONLYDISK is not set
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_PCI_WIP is not set
# CONFIG_BLK_DEV_IDEDMA_TIMEOUT is not set
# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_AEC62XX_TUNING is not set
......
......@@ -739,7 +739,6 @@ static struct ioctl32_list ioctl32_handler_table[] = {
IOCTL32_HANDLER(HDIO_GET_DMA, hdio_ioctl_trans),
IOCTL32_HANDLER(HDIO_GET_NICE, hdio_ioctl_trans),
IOCTL32_DEFAULT(HDIO_GET_IDENTITY),
IOCTL32_DEFAULT(HDIO_DRIVE_RESET),
// HDIO_TRISTATE_HWIF /* not implemented */
// HDIO_DRIVE_TASK /* To do, need specs */
IOCTL32_DEFAULT(HDIO_DRIVE_CMD),
......
......@@ -290,7 +290,6 @@ CONFIG_IDEDMA_PCI_AUTO=y
CONFIG_IDEDMA_ONLYDISK=y
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_PCI_WIP is not set
# CONFIG_BLK_DEV_IDEDMA_TIMEOUT is not set
# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_AEC62XX_TUNING is not set
......
......@@ -253,15 +253,6 @@ CONFIG_IDEDMA_NEW_DRIVE_LISTINGS
If in doubt, say N.
CONFIG_BLK_DEV_IDEDMA_TIMEOUT
If you say Y here, this is a NASTY UGLY HACK!
We have to issue an abort and requeue the request DMA engine got
turned off by a goofy ASIC, and we have to clean up the mess, and
here is as good as any. Do it globally for all chipsets.
If in doubt, say N.
CONFIG_BLK_DEV_OFFBOARD
Normally, IDE controllers built into the motherboard (on-board
controllers) are assigned to ide0 and ide1 while those on add-in PCI
......
......@@ -48,7 +48,6 @@ if [ "$CONFIG_BLK_DEV_IDE" != "n" ]; then
dep_bool ' Enable DMA only for disks ' CONFIG_IDEDMA_ONLYDISK $CONFIG_IDEDMA_PCI_AUTO
define_bool CONFIG_BLK_DEV_IDEDMA $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' ATA Work(s) In Progress (EXPERIMENTAL)' CONFIG_IDEDMA_PCI_WIP $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_EXPERIMENTAL
dep_bool ' Attempt to HACK around Chipsets that TIMEOUT (WIP)' CONFIG_BLK_DEV_IDEDMA_TIMEOUT $CONFIG_IDEDMA_PCI_WIP
dep_bool ' Good-Bad DMA Model-Firmware (WIP)' CONFIG_IDEDMA_NEW_DRIVE_LISTINGS $CONFIG_IDEDMA_PCI_WIP
dep_bool ' AEC62XX chipset support' CONFIG_BLK_DEV_AEC62XX $CONFIG_BLK_DEV_IDEDMA_PCI
dep_mbool ' AEC62XX Tuning support' CONFIG_AEC62XX_TUNING $CONFIG_BLK_DEV_AEC62XX
......
......@@ -75,7 +75,7 @@ obj-$(CONFIG_BLK_DEV_ATARAID_HPT) += hptraid.o
ide-obj-$(CONFIG_PROC_FS) += ide-proc.o
ide-mod-objs := ide-taskfile.o ide.o ide-probe.o ide-geometry.o ide-features.o $(ide-obj-y)
ide-mod-objs := ide-taskfile.o ide.o ide-probe.o ide-geometry.o ide-features.o ata-timing.o $(ide-obj-y)
include $(TOPDIR)/Rules.make
......
......@@ -24,7 +24,7 @@
#include <asm/io.h>
#include <asm/irq.h>
#include "ide_modes.h"
#include "ata-timing.h"
#define DISPLAY_AEC62XX_TIMINGS
......@@ -412,16 +412,11 @@ static int config_chipset_for_dma (ide_drive_t *drive, byte ultra)
static void aec62xx_tune_drive (ide_drive_t *drive, byte pio)
{
byte speed;
byte new_pio = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL);
switch(pio) {
case 5: speed = new_pio; break;
case 4: speed = XFER_PIO_4; break;
case 3: speed = XFER_PIO_3; break;
case 2: speed = XFER_PIO_2; break;
case 1: speed = XFER_PIO_1; break;
default: speed = XFER_PIO_0; break;
}
if (pio == 255)
speed = ata_timing_mode(drive, XFER_PIO | XFER_EPIO);
else
speed = XFER_PIO_0 + min_t(byte, pio, 4);
switch(HWIF(drive)->pci_dev->device) {
case PCI_DEVICE_ID_ARTOP_ATP850UF:
......
......@@ -48,7 +48,7 @@
#include <asm/io.h>
#include "ide_modes.h"
#include "ata-timing.h"
/* port addresses for auto-detection */
#define ALI_NUM_PORTS 4
......@@ -67,8 +67,6 @@ static RegInitializer initData[] __initdata = {
{0x35, 0x03}, {0x00, 0x00}
};
#define ALI_MAX_PIO 4
/* timing parameter registers for each drive */
static struct { byte reg1, reg2, reg3, reg4; } regTab[4] = {
{0x03, 0x26, 0x04, 0x27}, /* drive 0 */
......@@ -114,21 +112,26 @@ static void ali14xx_tune_drive (ide_drive_t *drive, byte pio)
int time1, time2;
byte param1, param2, param3, param4;
unsigned long flags;
ide_pio_data_t d;
struct ata_timing *t;
if (pio == 255)
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO);
else
pio = XFER_PIO_0 + min_t(byte, pio, 4);
pio = ide_get_best_pio_mode(drive, pio, ALI_MAX_PIO, &d);
t = ata_timing_data(pio);
/* calculate timing, according to PIO mode */
time1 = d.cycle_time;
time2 = ide_pio_timings[pio].active_time;
time1 = t->cycle;
time2 = t->active;
param3 = param1 = (time2 * system_bus_speed + 999) / 1000;
param4 = param2 = (time1 * system_bus_speed + 999) / 1000 - param1;
if (pio < 3) {
if (pio < XFER_PIO_3) {
param3 += 8;
param4 += 8;
}
printk("%s: PIO mode%d, t1=%dns, t2=%dns, cycles = %d+%d, %d+%d\n",
drive->name, pio, time1, time2, param1, param2, param3, param4);
drive->name, pio - XFER_PIO_0, time1, time2, param1, param2, param3, param4);
/* stuff timing parameters into controller registers */
driveNum = (HWIF(drive)->index << 1) + drive->select.b.unit;
......
......@@ -26,7 +26,7 @@
#include <asm/io.h>
#include "ide_modes.h"
#include "ata-timing.h"
#define DISPLAY_ALI_TIMINGS
......@@ -241,7 +241,7 @@ static struct pci_dev *isa_dev;
static void ali15x3_tune_drive (ide_drive_t *drive, byte pio)
{
ide_pio_data_t d;
struct ata_timing *t;
ide_hwif_t *hwif = HWIF(drive);
struct pci_dev *dev = hwif->pci_dev;
int s_time, a_time, c_time;
......@@ -251,14 +251,20 @@ static void ali15x3_tune_drive (ide_drive_t *drive, byte pio)
int portFIFO = hwif->channel ? 0x55 : 0x54;
byte cd_dma_fifo = 0;
pio = ide_get_best_pio_mode(drive, pio, 5, &d);
s_time = ide_pio_timings[pio].setup_time;
a_time = ide_pio_timings[pio].active_time;
if (pio == 255)
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO);
else
pio = XFER_PIO_0 + min_t(byte, pio, 4);
t = ata_timing_data(pio);
s_time = t->setup;
a_time = t->active;
if ((s_clc = (s_time * system_bus_speed + 999) / 1000) >= 8)
s_clc = 0;
if ((a_clc = (a_time * system_bus_speed + 999) / 1000) >= 8)
a_clc = 0;
c_time = ide_pio_timings[pio].cycle_time;
c_time = t->cycle;
#if 0
if ((r_clc = ((c_time - s_time - a_time) * system_bus_speed + 999) / 1000) >= 16)
......@@ -295,17 +301,6 @@ static void ali15x3_tune_drive (ide_drive_t *drive, byte pio)
pci_write_config_byte(dev, port, s_clc);
pci_write_config_byte(dev, port+drive->select.b.unit+2, (a_clc << 4) | r_clc);
__restore_flags(flags);
/*
* setup active rec
* { 70, 165, 365 }, PIO Mode 0
* { 50, 125, 208 }, PIO Mode 1
* { 30, 100, 110 }, PIO Mode 2
* { 30, 80, 70 }, PIO Mode 3 with IORDY
* { 25, 70, 25 }, PIO Mode 4 with IORDY ns
* { 20, 50, 30 } PIO Mode 5 with IORDY (nonstandard)
*/
}
static int ali15x3_tune_chipset (ide_drive_t *drive, byte speed)
......
......@@ -44,7 +44,7 @@
#include <linux/ide.h>
#include <asm/io.h>
#include "ide-timing.h"
#include "ata-timing.h"
#define AMD_IDE_ENABLE 0x40
#define AMD_IDE_CONFIG 0x41
......@@ -193,7 +193,7 @@ static int amd_get_info(char *buffer, char **addr, off_t offset, int count)
* amd_set_speed() writes timing values to the chipset registers
*/
static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timing *timing)
static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ata_timing *timing)
{
unsigned char t;
......@@ -226,7 +226,7 @@ static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi
static int amd_set_drive(ide_drive_t *drive, unsigned char speed)
{
ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
struct ide_timing t, p;
struct ata_timing t, p;
int T, UT;
if (speed != XFER_PIO_SLOW && speed != drive->current_speed)
......@@ -235,13 +235,13 @@ static int amd_set_drive(ide_drive_t *drive, unsigned char speed)
drive->dn >> 1, drive->dn & 1);
T = 1000000000 / amd_clock;
UT = T / MIN(MAX(amd_config->flags & AMD_UDMA, 1), 2);
UT = T / min_t(int, max_t(int, amd_config->flags & AMD_UDMA, 1), 2);
ide_timing_compute(drive, speed, &t, T, UT);
ata_timing_compute(drive, speed, &t, T, UT);
if (peer->present) {
ide_timing_compute(peer, peer->current_speed, &p, T, UT);
ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
ata_timing_compute(peer, peer->current_speed, &p, T, UT);
ata_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
}
if (speed == XFER_UDMA_5 && amd_clock <= 33333) t.udma = 1;
......@@ -266,11 +266,11 @@ static void amd74xx_tune_drive(ide_drive_t *drive, unsigned char pio)
return;
if (pio == 255) {
amd_set_drive(drive, ide_find_best_mode(drive, XFER_PIO | XFER_EPIO));
amd_set_drive(drive, ata_timing_mode(drive, XFER_PIO | XFER_EPIO));
return;
}
amd_set_drive(drive, XFER_PIO_0 + MIN(pio, 5));
amd_set_drive(drive, XFER_PIO_0 + min_t(byte, pio, 5));
}
#ifdef CONFIG_BLK_DEV_IDEDMA
......@@ -288,7 +288,7 @@ int amd74xx_dmaproc(ide_dma_action_t func, ide_drive_t *drive)
short w80 = HWIF(drive)->udma_four;
short speed = ide_find_best_mode(drive,
short speed = ata_timing_mode(drive,
XFER_PIO | XFER_EPIO | XFER_MWDMA | XFER_UDMA |
((amd_config->flags & AMD_BAD_SWDMA) ? 0 : XFER_SWDMA) |
(w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_66 ? XFER_UDMA_66 : 0) |
......
#ifndef _ATA_TIMING_H
#define _ATA_TIMING_H
/*
* $Id: ata-timing.h,v 2.0 2002/03/12 13:02:22 vojtech Exp $
*
* Copyright (C) 1996 Linus Torvalds, Igor Abramov, and Mark Lord
* Copyright (C) 1999-2001 Vojtech Pavlik
*/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/hdreg.h>
#include <linux/ide.h>
#define XFER_PIO_5 0x0d
#define XFER_UDMA_SLOW 0x4f
struct ata_timing {
short mode;
short setup; /* t1 */
short act8b; /* t2 for 8-bit io */
short rec8b; /* t2i for 8-bit io */
short cyc8b; /* t0 for 8-bit io */
short active; /* t2 or tD */
short recover; /* t2i or tK */
short cycle; /* t0 */
short udma; /* t2CYCTYP/2 */
};
extern struct ata_timing ata_timing[];
#define IDE_TIMING_SETUP 0x01
#define IDE_TIMING_ACT8B 0x02
#define IDE_TIMING_REC8B 0x04
#define IDE_TIMING_CYC8B 0x08
#define IDE_TIMING_8BIT 0x0e
#define IDE_TIMING_ACTIVE 0x10
#define IDE_TIMING_RECOVER 0x20
#define IDE_TIMING_CYCLE 0x40
#define IDE_TIMING_UDMA 0x80
#define IDE_TIMING_ALL 0xff
#define FIT(v,x,y) max_t(int,min_t(int,v,x),y)
#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
#define XFER_MODE 0xf0
#define XFER_UDMA_133 0x48
#define XFER_UDMA_100 0x44
#define XFER_UDMA_66 0x42
#define XFER_UDMA 0x40
#define XFER_MWDMA 0x20
#define XFER_SWDMA 0x10
#define XFER_EPIO 0x01
#define XFER_PIO 0x00
/* External interface to host chips chanell timing setup.
*
* It's a bit elaborate due to the legacy we have to bear.
*/
extern short ata_timing_mode(ide_drive_t *drive, int map);
extern void ata_timing_quantize(struct ata_timing *t, struct ata_timing *q,
int T, int UT);
extern void ata_timing_merge(struct ata_timing *a, struct ata_timing *b,
struct ata_timing *m, unsigned int what);
extern struct ata_timing* ata_timing_data(short speed);
extern int ata_timing_compute(ide_drive_t *drive,
short speed, struct ata_timing *t, int T, int UT);
#endif
......@@ -112,7 +112,7 @@
#include <asm/io.h>
#include "ide_modes.h"
#include "ata-timing.h"
/*
* This flag is set in ide.c by the parameter: ide0=cmd640_vlb
......@@ -589,15 +589,11 @@ static void program_drive_counts (unsigned int index)
/*
* Set a specific pio_mode for a drive
*/
static void cmd640_set_mode (unsigned int index, byte pio_mode, unsigned int cycle_time)
static void cmd640_set_mode (unsigned int index, byte pio_mode, unsigned int cycle_time, unsigned int active_time, unsigned int setup_time)
{
int setup_time, active_time, recovery_time, clock_time;
int recovery_time, clock_time;
byte setup_count, active_count, recovery_count, recovery_count2, cycle_count;
if (pio_mode > 5)
pio_mode = 5;
setup_time = ide_pio_timings[pio_mode].setup_time;
active_time = ide_pio_timings[pio_mode].active_time;
recovery_time = cycle_time - (setup_time + active_time);
clock_time = 1000 / system_bus_speed;
cycle_count = (cycle_time + clock_time - 1) / clock_time;
......@@ -635,7 +631,7 @@ static void cmd640_set_mode (unsigned int index, byte pio_mode, unsigned int cyc
*
* But we do not, because:
* 1) this is the wrong place to do it (proper is do_special() in ide.c)
* 2) in practice this is rarely, if ever, necessary
* 2) in practice this is rarely, if ever, necessary
*/
program_drive_counts (index);
}
......@@ -646,7 +642,7 @@ static void cmd640_set_mode (unsigned int index, byte pio_mode, unsigned int cyc
static void cmd640_tune_drive (ide_drive_t *drive, byte mode_wanted)
{
byte b;
ide_pio_data_t d;
struct ata_timing *t;
unsigned int index = 0;
while (drive != cmd_drives[index]) {
......@@ -674,14 +670,16 @@ static void cmd640_tune_drive (ide_drive_t *drive, byte mode_wanted)
return;
}
(void) ide_get_best_pio_mode (drive, mode_wanted, 5, &d);
cmd640_set_mode (index, d.pio_mode, d.cycle_time);
if (mode_wanted == 255)
t = ata_timing_data(ata_timing_mode(drive, XFER_PIO | XFER_EPIO));
else
t = ata_timing_data(XFER_PIO_0 + min_t(byte, mode_wanted, 4));
cmd640_set_mode(index, t->mode - XFER_PIO_0, t->cycle, t->active, t->setup);
printk ("%s: selected cmd640 PIO mode%d (%dns)",
drive->name, t->mode, t->cycle);
printk ("%s: selected cmd640 PIO mode%d (%dns)%s",
drive->name,
d.pio_mode,
d.cycle_time,
d.overridden ? " (overriding vendor mode)" : "");
display_clocks(index);
return;
}
......
......@@ -23,7 +23,7 @@
#include <asm/io.h>
#include "ide_modes.h"
#include "ata-timing.h"
#ifndef SPLIT_BYTE
#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
......@@ -272,17 +272,17 @@ static void program_drive_counts (ide_drive_t *drive, int setup_count, int activ
/*
* Attempts to set the interface PIO mode.
* The preferred method of selecting PIO modes (e.g. mode 4) is
* The preferred method of selecting PIO modes (e.g. mode 4) is
* "echo 'piomode:4' > /proc/ide/hdx/settings". Special cases are
* 8: prefetch off, 9: prefetch on, 255: auto-select best mode.
* Called with 255 at boot time.
*/
static void cmd64x_tuneproc (ide_drive_t *drive, byte mode_wanted)
{
int setup_time, active_time, recovery_time, clock_time, pio_mode, cycle_time;
int recovery_time, clock_time;
byte recovery_count2, cycle_count;
int setup_count, active_count, recovery_count;
ide_pio_data_t d;
struct ata_timing *t;
switch (mode_wanted) {
case 8: /* set prefetch off */
......@@ -291,27 +291,21 @@ static void cmd64x_tuneproc (ide_drive_t *drive, byte mode_wanted)
/*set_prefetch_mode(index, mode_wanted);*/
cmdprintk("%s: %sabled cmd640 prefetch\n", drive->name, mode_wanted ? "en" : "dis");
return;
case 255: mode_wanted = ata_timing_mode(drive, XFER_PIO | XFER_EPIO);
}
mode_wanted = ide_get_best_pio_mode (drive, mode_wanted, 5, &d);
pio_mode = d.pio_mode;
cycle_time = d.cycle_time;
t = ata_timing_data(XFER_PIO_0 + min_t(byte, mode_wanted, 4));
/*
* I copied all this complicated stuff from cmd640.c and made a few minor changes.
* For now I am just going to pray that it is correct.
*/
if (pio_mode > 5)
pio_mode = 5;
setup_time = ide_pio_timings[pio_mode].setup_time;
active_time = ide_pio_timings[pio_mode].active_time;
recovery_time = cycle_time - (setup_time + active_time);
clock_time = 1000 / system_bus_speed;
cycle_count = (cycle_time + clock_time - 1) / clock_time;
setup_count = (setup_time + clock_time - 1) / clock_time;
active_count = (active_time + clock_time - 1) / clock_time;
recovery_time = t->cycle - (t->setup + t->active);
clock_time = 1000 / system_bus_speed;
cycle_count = (t->cycle + clock_time - 1) / clock_time;
setup_count = (t->setup + clock_time - 1) / clock_time;
active_count = (t->active + clock_time - 1) / clock_time;
recovery_count = (recovery_time + clock_time - 1) / clock_time;
recovery_count2 = cycle_count - (setup_count + active_count);
......@@ -334,9 +328,8 @@ static void cmd64x_tuneproc (ide_drive_t *drive, byte mode_wanted)
*/
program_drive_counts (drive, setup_count, active_count, recovery_count);
cmdprintk("%s: selected cmd646 PIO mode%d : %d (%dns)%s, clocks=%d/%d/%d\n",
drive->name, pio_mode, mode_wanted, cycle_time,
d.overridden ? " (overriding vendor mode)" : "",
cmdprintk("%s: selected cmd646 PIO mode%d : %d (%dns), clocks=%d/%d/%d\n",
drive->name, t.mode - XFER_PIO_0, mode_wanted, cycle_time,
setup_count, active_count, recovery_count);
}
......@@ -391,7 +384,7 @@ static void cmd680_tuneproc (ide_drive_t *drive, byte mode_wanted)
static void config_cmd64x_chipset_for_pio (ide_drive_t *drive, byte set_speed)
{
byte speed = 0x00;
byte set_pio = ide_get_best_pio_mode(drive, 4, 5, NULL);
byte set_pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
cmd64x_tuneproc(drive, set_pio);
speed = XFER_PIO_0 + set_pio;
......@@ -408,7 +401,7 @@ static void config_cmd680_chipset_for_pio (ide_drive_t *drive, byte set_speed)
u8 speed = 0x00;
u8 mode_pci = 0x00;
u8 channel_timings = cmd680_taskfile_timing(hwif);
u8 set_pio = ide_get_best_pio_mode(drive, 4, 5, NULL);
u8 set_pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
pci_read_config_byte(dev, addr_mask, &mode_pci);
mode_pci &= ~((unit) ? 0x30 : 0x03);
......
......@@ -27,7 +27,7 @@
#include <asm/io.h>
#include <asm/irq.h>
#include "ide_modes.h"
#include "ata-timing.h"
#define DISPLAY_CS5530_TIMINGS
......@@ -114,10 +114,13 @@ static void cs5530_tuneproc (ide_drive_t *drive, byte pio) /* pio=255 means "aut
{
ide_hwif_t *hwif = HWIF(drive);
unsigned int format, basereg = CS5530_BASEREG(hwif);
static byte modes[5] = {XFER_PIO_0, XFER_PIO_1, XFER_PIO_2, XFER_PIO_3, XFER_PIO_4};
pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
if (!cs5530_set_xfer_mode(drive, modes[pio])) {
if (pio == 255)
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO);
else
pio = XFER_PIO_0 + min_t(byte, pio, 4);
if (!cs5530_set_xfer_mode(drive, pio)) {
format = (inl(basereg+4) >> 31) & 1;
outl(cs5530_pio_timings[format][pio], basereg+(drive->select.b.unit<<3));
}
......
......@@ -53,7 +53,7 @@
#include <asm/io.h>
#include "ide_modes.h"
#include "ata-timing.h"
/* the current version */
#define CY82_VERSION "CY82C693U driver v0.34 99-13-12 Andreas S. Krebs (akrebs@altavista.net)"
......@@ -137,11 +137,14 @@ static int calc_clk (int time, int bus_speed)
* NOTE: for mode 0,1 and 2 drives 8-bit IDE command control registers are used
* for mode 3 and 4 drives 8 and 16-bit timings are the same
*
*/
*/
static void compute_clocks (byte pio, pio_clocks_t *p_pclk)
{
struct ata_timing *t;
int clk1, clk2;
t = ata_timing_data(XFER_PIO_0 + pio);
/* we don't check against CY82C693's min and max speed,
* so you can play with the idebus=xx parameter
*/
......@@ -150,15 +153,13 @@ static void compute_clocks (byte pio, pio_clocks_t *p_pclk)
pio = CY82C693_MAX_PIO;
/* let's calc the address setup time clocks */
p_pclk->address_time = (byte)calc_clk(ide_pio_timings[pio].setup_time, system_bus_speed);
p_pclk->address_time = (byte)calc_clk(t->setup, system_bus_speed);
/* let's calc the active and recovery time clocks */
clk1 = calc_clk(ide_pio_timings[pio].active_time, system_bus_speed);
clk1 = calc_clk(t->active, system_bus_speed);
/* calc recovery timing */
clk2 = ide_pio_timings[pio].cycle_time -
ide_pio_timings[pio].active_time -
ide_pio_timings[pio].setup_time;
clk2 = t->cycle - t->active - t->setup;
clk2 = calc_clk(clk2, system_bus_speed);
......@@ -166,7 +167,7 @@ static void compute_clocks (byte pio, pio_clocks_t *p_pclk)
/* note: we use the same values for 16bit IOR and IOW
* those are all the same, since I don't have other
* timings than those from ide_modes.h
* timings than those from ata-timing.h
*/
p_pclk->time_16r = (byte)clk1;
......@@ -321,7 +322,7 @@ static void cy82c693_tune_drive (ide_drive_t *drive, byte pio)
#endif /* CY82C693_DEBUG_LOGS */
/* first let's calc the pio modes */
pio = ide_get_best_pio_mode(drive, pio, CY82C693_MAX_PIO, NULL);
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
#if CY82C693_DEBUG_INFO
printk (KERN_INFO "%s: Selected PIO mode %d\n", drive->name, pio);
......
......@@ -15,7 +15,7 @@
#include <asm/io.h>
#include "ide_modes.h"
#include "ata-timing.h"
/*
* Changing this #undef to #define may solve start up problems in some systems.
......@@ -70,7 +70,7 @@ static void tune_dtc2278 (ide_drive_t *drive, byte pio)
{
unsigned long flags;
pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
if (pio >= 3) {
save_flags(flags); /* all CPUs */
......
......@@ -40,7 +40,7 @@
#include <asm/io.h>
#include <asm/irq.h>
#include "ide_modes.h"
#include "ata-timing.h"
#ifndef SPLIT_BYTE
#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
......@@ -145,16 +145,16 @@ static int hpt34x_tune_chipset (ide_drive_t *drive, byte speed)
return(err);
}
static void config_chipset_for_pio (ide_drive_t *drive)
static void config_chipset_for_pio(ide_drive_t *drive)
{
unsigned short eide_pio_timing[6] = {960, 480, 240, 180, 120, 90};
unsigned short xfer_pio = drive->id->eide_pio_modes;
byte timing, speed, pio;
pio = ide_get_best_pio_mode(drive, 255, 5, NULL);
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
if (xfer_pio> 4)
if (xfer_pio > 4)
xfer_pio = 0;
if (drive->id->eide_pio_iordy > 0) {
......
......@@ -61,7 +61,7 @@
#include <asm/io.h>
#include <asm/irq.h>
#include "ide_modes.h"
#include "ata-timing.h"
#define DISPLAY_HPT366_TIMINGS
......@@ -600,9 +600,9 @@ static void config_chipset_for_pio (ide_drive_t *drive)
unsigned short xfer_pio = drive->id->eide_pio_modes;
byte timing, speed, pio;
pio = ide_get_best_pio_mode(drive, 255, 5, NULL);
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
if (xfer_pio> 4)
if (xfer_pio > 4)
xfer_pio = 0;
if (drive->id->eide_pio_iordy > 0) {
......@@ -928,13 +928,13 @@ static int hpt3xx_tristate (ide_drive_t * drive, int state)
pci_read_config_byte(dev, state_reg, &regXXh);
if (state) {
(void) ide_do_reset(drive);
// reset drives...
pci_write_config_byte(dev, state_reg, regXXh|0x80);
pci_write_config_byte(dev, 0x59, reg59h|reset);
} else {
pci_write_config_byte(dev, 0x59, reg59h & ~(reset));
pci_write_config_byte(dev, state_reg, regXXh & ~(0x80));
(void) ide_do_reset(drive);
// reset drives...
}
return 0;
}
......
......@@ -44,7 +44,7 @@
#include <asm/io.h>
#include "ide_modes.h"
#include "ata-timing.h"
/* #define DEBUG */ /* remove comments for DEBUG messages */
......@@ -199,20 +199,23 @@ static byte ht_pio2timings(ide_drive_t *drive, byte pio)
{
int active_time, recovery_time;
int active_cycles, recovery_cycles;
ide_pio_data_t d;
struct ata_timing *t;
if (pio) {
pio = ide_get_best_pio_mode(drive, pio, 5, &d);
if (pio == 255)
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO);
else
pio = XFER_PIO_0 + min_t(byte, pio, 4);
t = ata_timing_data(pio);
/*
* Just like opti621.c we try to calculate the
* actual cycle time for recovery and activity
* according system bus speed.
*/
active_time = ide_pio_timings[pio].active_time;
recovery_time = d.cycle_time
- active_time
- ide_pio_timings[pio].setup_time;
active_time = t->active;
recovery_time = t->cycle - active_time - t->setup;
/*
* Cycle times should be Vesa bus cycles
*/
......@@ -227,7 +230,8 @@ static byte ht_pio2timings(ide_drive_t *drive, byte pio)
if (recovery_cycles > 15) recovery_cycles = 0; /* 0==16 */
#ifdef DEBUG
printk("ht6560b: drive %s setting pio=%d recovery=%d (%dns) active=%d (%dns)\n", drive->name, pio, recovery_cycles, recovery_time, active_cycles, active_time);
printk("ht6560b: drive %s setting pio=%d recovery=%d (%dns) active=%d (%dns)\n",
drive->name, pio - XFER_PIO_0, recovery_cycles, recovery_time, active_cycles, active_time);
#endif
return (byte)((recovery_cycles << 4) | active_cycles);
......
......@@ -351,90 +351,6 @@ static ide_startstop_t icside_dmaintr(ide_drive_t *drive)
return ide_error(drive, "dma_intr", stat);
}
/*
* The following is a sick duplication from ide-dma.c ;(
*
* This should be defined in one place only.
*/
struct drive_list_entry {
char * id_model;
char * id_firmware;
};
static struct drive_list_entry drive_whitelist [] = {
{ "Micropolis 2112A", "ALL" },
{ "CONNER CTMA 4000", "ALL" },
{ "CONNER CTT8000-A", "ALL" },
{ "ST34342A", "ALL" },
{ NULL, 0 }
};
static struct drive_list_entry drive_blacklist [] = {
{ "WDC AC11000H", "ALL" },
{ "WDC AC22100H", "ALL" },
{ "WDC AC32500H", "ALL" },
{ "WDC AC33100H", "ALL" },
{ "WDC AC31600H", "ALL" },
{ "WDC AC32100H", "24.09P07" },
{ "WDC AC23200L", "21.10N21" },
{ "Compaq CRD-8241B", "ALL" },
{ "CRD-8400B", "ALL" },
{ "CRD-8480B", "ALL" },
{ "CRD-8480C", "ALL" },
{ "CRD-8482B", "ALL" },
{ "CRD-84", "ALL" },
{ "SanDisk SDP3B", "ALL" },
{ "SanDisk SDP3B-64", "ALL" },
{ "SANYO CD-ROM CRD", "ALL" },
{ "HITACHI CDR-8", "ALL" },
{ "HITACHI CDR-8335", "ALL" },
{ "HITACHI CDR-8435", "ALL" },
{ "Toshiba CD-ROM XM-6202B", "ALL" },
{ "CD-532E-A", "ALL" },
{ "E-IDE CD-ROM CR-840", "ALL" },
{ "CD-ROM Drive/F5A", "ALL" },
{ "RICOH CD-R/RW MP7083A", "ALL" },
{ "WPI CDD-820", "ALL" },
{ "SAMSUNG CD-ROM SC-148C", "ALL" },
{ "SAMSUNG CD-ROM SC-148F", "ALL" },
{ "SAMSUNG CD-ROM SC", "ALL" },
{ "SanDisk SDP3B-64", "ALL" },
{ "SAMSUNG CD-ROM SN-124", "ALL" },
{ "PLEXTOR CD-R PX-W8432T", "ALL" },
{ "ATAPI CD-ROM DRIVE 40X MAXIMUM", "ALL" },
{ "_NEC DV5800A", "ALL" },
{ NULL, 0 }
};
static int in_drive_list(struct hd_driveid *id, struct drive_list_entry * drive_table)
{
for ( ; drive_table->id_model ; drive_table++)
if ((!strcmp(drive_table->id_model, id->model)) &&
((!strstr(drive_table->id_firmware, id->fw_rev)) ||
(!strcmp(drive_table->id_firmware, "ALL"))))
return 1;
return 0;
}
/*
* For both Blacklisted and Whitelisted drives.
* This is setup to be called as an extern for future support
* to other special driver code.
*/
static int icside_check_drive_lists(ide_drive_t *drive, int good_bad)
{
struct hd_driveid *id = drive->id;
if (good_bad) {
return in_drive_list(id, drive_whitelist);
} else {
int blacklist = in_drive_list(id, drive_blacklist);
if (blacklist)
printk("%s: Disabling DMA for %s\n", drive->name, id->model);
return(blacklist);
}
return 0;
}
static int
icside_dma_check(ide_drive_t *drive)
......@@ -448,14 +364,6 @@ icside_dma_check(ide_drive_t *drive)
if (!id || !(id->capability & 1) || !autodma)
goto out;
/*
* Consult the list of known "bad" drives
*/
if (icside_check_drive_lists(drive, 0)) {
func = ide_dma_off;
goto out;
}
/*
* Enable DMA on any drive that has multiword DMA
*/
......@@ -473,16 +381,6 @@ icside_dma_check(ide_drive_t *drive)
goto out;
}
/*
* Consult the list of known "good" drives
*/
if (icside_check_drive_lists(drive, 1)) {
if (id->eide_dma_time > 150)
goto out;
xfer_mode = XFER_MW_DMA_1;
func = ide_dma_on;
}
out:
func = icside_config_if(drive, xfer_mode);
......@@ -563,11 +461,6 @@ icside_dmaproc(ide_dma_action_t func, ide_drive_t *drive)
case ide_dma_test_irq:
return inb((unsigned long)hwif->hw.priv) & 1;
case ide_dma_bad_drive:
case ide_dma_good_drive:
return icside_check_drive_lists(drive, (func ==
ide_dma_good_drive));
case ide_dma_verbose:
return icside_dma_verbose(drive);
......@@ -605,13 +498,12 @@ icside_setup_dma(ide_hwif_t *hwif, int autodma)
return 0;
}
int ide_release_dma(ide_hwif_t *hwif)
void ide_release_dma(ide_hwif_t *hwif)
{
if (hwif->sg_table) {
kfree(hwif->sg_table);
hwif->sg_table = NULL;
}
return 1;
}
#endif
......
......@@ -1671,11 +1671,16 @@ ide_do_rw_cdrom (ide_drive_t *drive, struct request *rq, unsigned long block)
} else if (rq->flags & (REQ_PC | REQ_SENSE)) {
return cdrom_do_packet_command(drive);
} else if (rq->flags & REQ_SPECIAL) {
/*
* FIXME: Kill REQ_SEPCIAL and replace it will command commands
* queued at the request queue instead as suggested (abd
* rightly so) by Linus.
*
* right now this can only be a reset...
*/
cdrom_end_request(drive, 1);
return ide_do_reset(drive);
cdrom_end_request(drive, 1); return ide_stopped;
} else if (rq->flags & REQ_BLOCK_PC) {
return cdrom_do_block_pc(drive, rq);
}
......
......@@ -439,7 +439,7 @@ static unsigned long long idedisk_read_native_max_address_ext(ide_drive_t *drive
if ((args.tfRegister[IDE_STATUS_OFFSET] & 0x01) == 0) {
u32 high = ((args.hobRegister[IDE_HCYL_OFFSET_HOB])<<16) |
((args.hobRegister[IDE_LCYL_OFFSET_HOB])<<8) |
(args.hobRegister[IDE_SECTOR_OFFSET_HOB]);
(args.hobRegister[IDE_SECTOR_OFFSET_HOB]);
u32 low = ((args.tfRegister[IDE_HCYL_OFFSET])<<16) |
((args.tfRegister[IDE_LCYL_OFFSET])<<8) |
(args.tfRegister[IDE_SECTOR_OFFSET]);
......@@ -458,7 +458,7 @@ static unsigned long idedisk_set_max_address(ide_drive_t *drive, unsigned long a
{
ide_task_t args;
unsigned long addr_set = 0;
addr_req--;
/* Create IDE/ATA command request structure */
memset(&args, 0, sizeof(ide_task_t));
......@@ -907,13 +907,26 @@ static void idedisk_add_settings(ide_drive_t *drive)
static int idedisk_suspend(struct device *dev, u32 state, u32 level)
{
int i;
ide_drive_t *drive = dev->driver_data;
/* I hope that every freeze operations from the upper levels have
* already been done...
*/
/* wait until all commands are finished */
printk("ide_disk_suspend()\n");
while (HWGROUP(drive)->handler)
schedule();
yield();
/* set the drive to standby */
printk(KERN_INFO "suspending: %s ", drive->name);
if (ata_ops(drive)) {
if (ata_ops(drive)->standby)
ata_ops(drive)->standby(drive);
}
drive->blocked = 1;
return 0;
}
static int idedisk_resume(struct device *dev, u32 level)
......@@ -921,7 +934,9 @@ static int idedisk_resume(struct device *dev, u32 level)
ide_drive_t *drive = dev->driver_data;
if (!drive->blocked)
panic("ide: Resume but not suspended?\n");
drive->blocked = 0;
return 0;
}
......
......@@ -106,65 +106,64 @@ struct drive_list_entry {
char * id_firmware;
};
struct drive_list_entry drive_whitelist [] = {
{ "Micropolis 2112A" , "ALL" },
{ "CONNER CTMA 4000" , "ALL" },
{ "CONNER CTT8000-A" , "ALL" },
{ "ST34342A" , "ALL" },
{ 0 , 0 }
struct drive_list_entry drive_whitelist[] = {
{ "Micropolis 2112A", NULL },
{ "CONNER CTMA 4000", NULL },
{ "CONNER CTT8000-A", NULL },
{ "ST34342A", NULL },
{ NULL, NULL }
};
struct drive_list_entry drive_blacklist [] = {
{ "WDC AC11000H" , "ALL" },
{ "WDC AC22100H" , "ALL" },
{ "WDC AC32500H" , "ALL" },
{ "WDC AC33100H" , "ALL" },
{ "WDC AC31600H" , "ALL" },
{ "WDC AC32100H" , "24.09P07" },
{ "WDC AC23200L" , "21.10N21" },
{ "Compaq CRD-8241B" , "ALL" },
{ "CRD-8400B" , "ALL" },
{ "CRD-8480B", "ALL" },
{ "CRD-8480C", "ALL" },
{ "CRD-8482B", "ALL" },
{ "CRD-84" , "ALL" },
{ "SanDisk SDP3B" , "ALL" },
{ "SanDisk SDP3B-64" , "ALL" },
{ "SANYO CD-ROM CRD" , "ALL" },
{ "HITACHI CDR-8" , "ALL" },
{ "HITACHI CDR-8335" , "ALL" },
{ "HITACHI CDR-8435" , "ALL" },
{ "Toshiba CD-ROM XM-6202B" , "ALL" },
{ "CD-532E-A" , "ALL" },
{ "E-IDE CD-ROM CR-840", "ALL" },
{ "CD-ROM Drive/F5A", "ALL" },
{ "RICOH CD-R/RW MP7083A", "ALL" },
{ "WPI CDD-820", "ALL" },
{ "SAMSUNG CD-ROM SC-148C", "ALL" },
{ "SAMSUNG CD-ROM SC-148F", "ALL" },
{ "SAMSUNG CD-ROM SC", "ALL" },
{ "SanDisk SDP3B-64" , "ALL" },
{ "SAMSUNG CD-ROM SN-124", "ALL" },
{ "PLEXTOR CD-R PX-W8432T", "ALL" },
{ "ATAPI CD-ROM DRIVE 40X MAXIMUM", "ALL" },
{ "_NEC DV5800A", "ALL" },
{ 0 , 0 }
struct drive_list_entry drive_blacklist[] = {
{ "WDC AC11000H", NULL },
{ "WDC AC22100H", NULL },
{ "WDC AC32500H", NULL },
{ "WDC AC33100H", NULL },
{ "WDC AC31600H", NULL },
{ "WDC AC32100H", "24.09P07" },
{ "WDC AC23200L", "21.10N21" },
{ "Compaq CRD-8241B", NULL },
{ "CRD-8400B", NULL },
{ "CRD-8480B", NULL },
{ "CRD-8480C", NULL },
{ "CRD-8482B", NULL },
{ "CRD-84", NULL },
{ "SanDisk SDP3B", NULL },
{ "SanDisk SDP3B-64", NULL },
{ "SANYO CD-ROM CRD", NULL },
{ "HITACHI CDR-8", NULL },
{ "HITACHI CDR-8335", NULL },
{ "HITACHI CDR-8435", NULL },
{ "Toshiba CD-ROM XM-6202B", NULL },
{ "CD-532E-A", NULL },
{ "E-IDE CD-ROM CR-840", NULL },
{ "CD-ROM Drive/F5A", NULL },
{ "RICOH CD-R/RW MP7083A", NULL },
{ "WPI CDD-820", NULL },
{ "SAMSUNG CD-ROM SC-148C", NULL },
{ "SAMSUNG CD-ROM SC-148F", NULL },
{ "SAMSUNG CD-ROM SC", NULL },
{ "SanDisk SDP3B-64", NULL },
{ "SAMSUNG CD-ROM SN-124", NULL },
{ "PLEXTOR CD-R PX-W8432T", NULL },
{ "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
{ "_NEC DV5800A", NULL },
{ NULL, NULL }
};
int in_drive_list(struct hd_driveid *id, struct drive_list_entry * drive_table)
static int in_drive_list(struct hd_driveid *id, struct drive_list_entry * drive_table)
{
for ( ; drive_table->id_model ; drive_table++)
if ((!strcmp(drive_table->id_model, id->model)) &&
((!strstr(drive_table->id_firmware, id->fw_rev)) ||
(!strcmp(drive_table->id_firmware, "ALL"))))
((drive_table->id_firmware && !strstr(drive_table->id_firmware, id->fw_rev)) ||
(!drive_table->id_firmware)))
return 1;
return 0;
}
#else /* !CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
#else
/*
* good_dma_drives() lists the model names (from "hdparm -i")
......@@ -185,7 +184,7 @@ const char *good_dma_drives[] = {"Micropolis 2112A",
* This is an empirical list. Its generated from bug reports. That means
* while it reflects actual problem distributions it doesn't answer whether
* the drive or the controller, or cabling, or software, or some combination
* thereof is the fault. If you don't happen to agree with the kernel's
* thereof is the fault. If you don't happen to agree with the kernel's
* opinion of your drive - use hdparm to turn DMA on.
*/
const char *bad_dma_drives[] = {"WDC AC11000H",
......@@ -194,9 +193,9 @@ const char *bad_dma_drives[] = {"WDC AC11000H",
"WDC AC32500H",
"WDC AC33100H",
"WDC AC31600H",
NULL};
NULL};
#endif /* CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
#endif
/*
* dma_intr() is the handler for disk read/write DMA interrupts
......@@ -498,11 +497,10 @@ static int config_drive_for_dma (ide_drive_t *drive)
return hwif->dmaproc(ide_dma_off_quietly, drive);
}
#ifndef CONFIG_BLK_DEV_IDEDMA_TIMEOUT
/*
* 1 dmaing, 2 error, 4 intr
* 1 dma-ing, 2 error, 4 intr
*/
static int dma_timer_expiry (ide_drive_t *drive)
static int dma_timer_expiry(ide_drive_t *drive)
{
byte dma_stat = inb(HWIF(drive)->dma_base+2);
......@@ -522,30 +520,6 @@ static int dma_timer_expiry (ide_drive_t *drive)
return WAIT_CMD;
return 0;
}
#else /* CONFIG_BLK_DEV_IDEDMA_TIMEOUT */
static ide_startstop_t ide_dma_timeout_revovery (ide_drive_t *drive)
{
ide_hwgroup_t *hwgroup = HWGROUP(drive);
ide_hwif_t *hwif = HWIF(drive);
int enable_dma = drive->using_dma;
unsigned long flags;
ide_startstop_t startstop;
spin_lock_irqsave(&ide_lock, flags);
hwgroup->handler = NULL;
del_timer(&hwgroup->timer);
spin_unlock_irqrestore(&ide_lock, flags);
drive->waiting_for_dma = 0;
startstop = ide_do_reset(drive);
if ((enable_dma) && !(drive->using_dma))
(void) hwif->dmaproc(ide_dma_on, drive);
return startstop;
}
#endif /* CONFIG_BLK_DEV_IDEDMA_TIMEOUT */
static void ide_toggle_bounce(ide_drive_t *drive, int on)
{
......@@ -614,11 +588,7 @@ int ide_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
drive->waiting_for_dma = 1;
if (drive->type != ATA_DISK)
return 0;
#ifdef CONFIG_BLK_DEV_IDEDMA_TIMEOUT
ide_set_handler(drive, &ide_dma_intr, 2*WAIT_CMD, NULL); /* issue cmd to drive */
#else
ide_set_handler(drive, &ide_dma_intr, WAIT_CMD, dma_timer_expiry); /* issue cmd to drive */
#endif
if ((HWGROUP(drive)->rq->flags & REQ_DRIVE_TASKFILE) &&
(drive->addressing == 1)) {
ide_task_t *args = HWGROUP(drive)->rq->special;
......@@ -659,41 +629,8 @@ int ide_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
case ide_dma_verbose:
return report_drive_dmaing(drive);
case ide_dma_timeout:
// FIXME: Many IDE chipsets do not permit command file register access
// FIXME: while the bus-master function is still active.
// FIXME: To prevent deadlock with those chipsets, we must be extremely
// FIXME: careful here (and in ide_intr() as well) to NOT access any
// FIXME: registers from the 0x1Fx/0x17x sets before terminating the
// FIXME: bus-master operation via the bus-master control reg.
// FIXME: Otherwise, chipset deadlock will occur, and some systems will
// FIXME: lock up completely!!
#ifdef CONFIG_BLK_DEV_IDEDMA_TIMEOUT
/*
* Have to issue an abort and requeue the request
* DMA engine got turned off by a goofy ASIC, and
* we have to clean up the mess, and here is as good
* as any. Do it globally for all chipsets.
*/
outb(0x00, dma_base); /* stop DMA */
dma_stat = inb(dma_base+2); /* get DMA status */
outb(dma_stat|6, dma_base+2); /* clear the INTR & ERROR bits */
printk("%s: %s: Lets do it again!" \
"stat = 0x%02x, dma_stat = 0x%02x\n",
drive->name, ide_dmafunc_verbose(func),
GET_STAT(), dma_stat);
if (dma_stat & 0xF0)
return ide_dma_timeout_revovery(drive);
printk("%s: %s: (restart_request) Lets do it again!" \
"stat = 0x%02x, dma_stat = 0x%02x\n",
drive->name, ide_dmafunc_verbose(func),
GET_STAT(), dma_stat);
return restart_request(drive); // BUG: return types do not match!!
//#else
// return HWGROUP(drive)->handler(drive);
#endif /* CONFIG_BLK_DEV_IDEDMA_TIMEOUT */
printk("ide_dmaproc: DMA timeout occured!\n");
return 1;
case ide_dma_retune:
case ide_dma_lostirq:
printk("ide_dmaproc: chipset supported %s func only: %d\n", ide_dmafunc_verbose(func), func);
......@@ -707,7 +644,7 @@ int ide_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
/*
* Needed for allowing full modular support of ide-driver
*/
int ide_release_dma(ide_hwif_t *hwif)
void ide_release_dma(ide_hwif_t *hwif)
{
if (!hwif->dma_base)
return;
......@@ -727,8 +664,6 @@ int ide_release_dma(ide_hwif_t *hwif)
release_region((hwif->dma_base + 16), hwif->dma_extra);
release_region(hwif->dma_base, 8);
hwif->dma_base = 0;
return 1;
}
/*
......
......@@ -931,7 +931,7 @@ static ide_startstop_t idefloppy_pc_intr (ide_drive_t *drive)
rq->errors++;
if (pc->c[0] == IDEFLOPPY_REQUEST_SENSE_CMD) {
printk (KERN_ERR "ide-floppy: I/O error in request sense command\n");
return ide_do_reset (drive);
return ide_stopped;
}
idefloppy_retry_pc (drive); /* Retry operation */
return ide_stopped; /* queued, but not started */
......@@ -945,8 +945,8 @@ static ide_startstop_t idefloppy_pc_intr (ide_drive_t *drive)
#ifdef CONFIG_BLK_DEV_IDEDMA
if (test_and_clear_bit (PC_DMA_IN_PROGRESS, &pc->flags)) {
printk (KERN_ERR "ide-floppy: The floppy wants to issue more interrupts in DMA mode\n");
(void) HWIF(drive)->dmaproc(ide_dma_off, drive);
return ide_do_reset (drive);
HWIF(drive)->dmaproc(ide_dma_off, drive);
return ide_stopped;
}
#endif /* CONFIG_BLK_DEV_IDEDMA */
bcount.b.high=IN_BYTE (IDE_BCOUNTH_REG); /* Get the number of bytes to transfer */
......@@ -955,12 +955,12 @@ static ide_startstop_t idefloppy_pc_intr (ide_drive_t *drive)
if (ireason.b.cod) {
printk (KERN_ERR "ide-floppy: CoD != 0 in idefloppy_pc_intr\n");
return ide_do_reset (drive);
return ide_stopped;
}
if (ireason.b.io == test_bit (PC_WRITING, &pc->flags)) { /* Hopefully, we will never get here */
printk (KERN_ERR "ide-floppy: We wanted to %s, ", ireason.b.io ? "Write":"Read");
printk (KERN_ERR "but the floppy wants us to %s !\n",ireason.b.io ? "Read":"Write");
return ide_do_reset (drive);
return ide_stopped;
}
if (!test_bit (PC_WRITING, &pc->flags)) { /* Reading - Check that we have enough space */
temp = pc->actually_transferred + bcount.all;
......@@ -1012,7 +1012,7 @@ static ide_startstop_t idefloppy_transfer_pc (ide_drive_t *drive)
ireason.all=IN_BYTE (IDE_IREASON_REG);
if (!ireason.b.cod || ireason.b.io) {
printk (KERN_ERR "ide-floppy: (IO,CoD) != (0,1) while issuing a packet command\n");
return ide_do_reset (drive);
return ide_stopped;
}
ide_set_handler (drive, &idefloppy_pc_intr, IDEFLOPPY_WAIT_CMD, NULL); /* Set the interrupt routine */
atapi_output_bytes (drive, floppy->pc->c, 12); /* Send the actual packet */
......@@ -1053,7 +1053,7 @@ static ide_startstop_t idefloppy_transfer_pc1 (ide_drive_t *drive)
ireason.all=IN_BYTE (IDE_IREASON_REG);
if (!ireason.b.cod || ireason.b.io) {
printk (KERN_ERR "ide-floppy: (IO,CoD) != (0,1) while issuing a packet command\n");
return ide_do_reset (drive);
return ide_stopped;
}
/*
* The following delay solves a problem with ATAPI Zip 100 drives where the
......
......@@ -37,7 +37,8 @@
#include <asm/machdep.h>
#include <asm/irq.h>
#include "ide_modes.h"
#include "ata-timing.h"
static int identify (volatile unsigned char *p);
static void print_fixed (volatile unsigned char *p);
static void print_funcid (int func);
......@@ -89,6 +90,12 @@ ide_ioport_desc_t ioport_dsc[MAX_HWIFS] = {
#endif /* IDE0_BASE_OFFSET */
};
typedef struct ide_pio_timings_s {
int setup_time; /* Address setup (ns) minimum */
int active_time; /* Active pulse (ns) minimum */
int cycle_time; /* Cycle time (ns) minimum = (setup + active + recovery) */
} ide_pio_timings_t;
ide_pio_timings_t ide_pio_clocks[6];
int hold_time[6] = {30, 20, 15, 10, 10, 10 }; /* PIO Mode 5 with IORDY (nonstandard) */
......@@ -222,19 +229,19 @@ m8xx_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
/* Compute clock cycles for PIO timings */
for (i=0; i<6; ++i) {
bd_t *binfo = (bd_t *)__res;
struct ata_timing *t;
t = ata_timing_data(i + XFER_PIO_0);
hold_time[i] =
PCMCIA_MK_CLKS (hold_time[i],
binfo->bi_busfreq);
ide_pio_clocks[i].setup_time =
PCMCIA_MK_CLKS (ide_pio_timings[i].setup_time,
binfo->bi_busfreq);
PCMCIA_MK_CLKS (t->setup, binfo->bi_busfreq);
ide_pio_clocks[i].active_time =
PCMCIA_MK_CLKS (ide_pio_timings[i].active_time,
binfo->bi_busfreq);
PCMCIA_MK_CLKS (t->active, binfo->bi_busfreq);
ide_pio_clocks[i].cycle_time =
PCMCIA_MK_CLKS (ide_pio_timings[i].cycle_time,
binfo->bi_busfreq);
PCMCIA_MK_CLKS (t->cycle, binfo->bi_busfreq);
#if 0
printk ("PIO mode %d timings: %d/%d/%d => %d/%d/%d\n",
i,
......@@ -242,10 +249,7 @@ m8xx_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
ide_pio_clocks[i].active_time,
ide_pio_clocks[i].hold_time,
ide_pio_clocks[i].cycle_time,
ide_pio_timings[i].setup_time,
ide_pio_timings[i].active_time,
ide_pio_timings[i].hold_time,
ide_pio_timings[i].cycle_time);
t->setup, t->active, hold_time[i], t->cycle);
#endif
}
}
......@@ -429,13 +433,13 @@ void m8xx_ide_init_hwif_ports (hw_regs_t *hw,
static void
m8xx_ide_tuneproc(ide_drive_t *drive, byte pio)
{
ide_pio_data_t d;
#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT)
volatile pcmconf8xx_t *pcmp;
ulong timing, mask, reg;
#endif
pio = ide_get_best_pio_mode(drive, pio, 4, &d);
if (pio == 255)
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
#if 1
printk("%s[%d] %s: best PIO mode: %d\n",
......
......@@ -36,7 +36,7 @@
#include <linux/pmu.h>
#include <asm/irq.h>
#endif
#include "ide_modes.h"
#include "ata-timing.h"
extern char *ide_dmafunc_verbose(ide_dma_action_t dmafunc);
......@@ -274,7 +274,7 @@ pmac_ide_do_setfeature(ide_drive_t *drive, byte command)
printk(KERN_ERR "pmac_ide_do_setfeature disk not ready after SET_FEATURE !\n");
out:
restore_flags(flags);
return result;
}
......@@ -282,34 +282,40 @@ pmac_ide_do_setfeature(ide_drive_t *drive, byte command)
static void
pmac_ide_tuneproc(ide_drive_t *drive, byte pio)
{
ide_pio_data_t d;
struct ata_timing *t;
int i;
u32 *timings;
int accessTicks, recTicks;
i = pmac_ide_find(drive);
if (i < 0)
return;
pio = ide_get_best_pio_mode(drive, pio, 4, &d);
accessTicks = SYSCLK_TICKS(ide_pio_timings[pio].active_time);
if (pio = 255)
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO);
else
pio = XFER_PIO_0 + min_t(byte, pio, 4);
t = ata_timing_data(pio);
accessTicks = SYSCLK_TICKS(t->active);
if (drive->select.all & 0x10)
timings = &pmac_ide[i].timings[1];
else
timings = &pmac_ide[i].timings[0];
if (pmac_ide[i].kind == controller_kl_ata4) {
/* The "ata-4" IDE controller of Core99 machines */
accessTicks = SYSCLK_TICKS_UDMA(ide_pio_timings[pio].active_time * 1000);
recTicks = SYSCLK_TICKS_UDMA(d.cycle_time * 1000) - accessTicks;
accessTicks = SYSCLK_TICKS_UDMA(t->active * 1000);
recTicks = SYSCLK_TICKS_UDMA(t->cycle * 1000) - accessTicks;
*timings = ((*timings) & 0x1FFFFFC00) | accessTicks | (recTicks << 5);
} else {
/* The old "ata-3" IDE controller */
accessTicks = SYSCLK_TICKS(ide_pio_timings[pio].active_time);
accessTicks = SYSCLK_TICKS(t->active);
if (accessTicks < 4)
accessTicks = 4;
recTicks = SYSCLK_TICKS(d.cycle_time) - accessTicks - 4;
recTicks = SYSCLK_TICKS(t->cycle) - accessTicks - 4;
if (recTicks < 1)
recTicks = 1;
......
......@@ -2108,7 +2108,7 @@ static ide_startstop_t idetape_pc_intr (ide_drive_t *drive)
#endif /* IDETAPE_DEBUG_LOG */
if (pc->c[0] == IDETAPE_REQUEST_SENSE_CMD) {
printk (KERN_ERR "ide-tape: I/O error in request sense command\n");
return ide_do_reset (drive);
return ide_stopped;
}
#if IDETAPE_DEBUG_LOG
if (tape->debug_level >= 1)
......@@ -2132,8 +2132,8 @@ static ide_startstop_t idetape_pc_intr (ide_drive_t *drive)
if (test_and_clear_bit (PC_DMA_IN_PROGRESS, &pc->flags)) {
printk (KERN_ERR "ide-tape: The tape wants to issue more interrupts in DMA mode\n");
printk (KERN_ERR "ide-tape: DMA disabled, reverting to PIO\n");
(void) HWIF(drive)->dmaproc(ide_dma_off, drive);
return ide_do_reset (drive);
HWIF(drive)->dmaproc(ide_dma_off, drive);
return ide_stopped;
}
#endif /* CONFIG_BLK_DEV_IDEDMA */
bcount.b.high = IN_BYTE (IDE_BCOUNTH_REG); /* Get the number of bytes to transfer */
......@@ -2142,12 +2142,12 @@ static ide_startstop_t idetape_pc_intr (ide_drive_t *drive)
if (ireason.b.cod) {
printk (KERN_ERR "ide-tape: CoD != 0 in idetape_pc_intr\n");
return ide_do_reset (drive);
return ide_stopped;
}
if (ireason.b.io == test_bit (PC_WRITING, &pc->flags)) { /* Hopefully, we will never get here */
printk (KERN_ERR "ide-tape: We wanted to %s, ", ireason.b.io ? "Write":"Read");
printk (KERN_ERR "ide-tape: but the tape wants us to %s !\n",ireason.b.io ? "Read":"Write");
return ide_do_reset (drive);
return ide_stopped;
}
if (!test_bit (PC_WRITING, &pc->flags)) { /* Reading - Check that we have enough space */
temp = pc->actually_transferred + bcount.all;
......@@ -2252,7 +2252,7 @@ static ide_startstop_t idetape_transfer_pc(ide_drive_t *drive)
}
if (!ireason.b.cod || ireason.b.io) {
printk (KERN_ERR "ide-tape: (IO,CoD) != (0,1) while issuing a packet command\n");
return ide_do_reset (drive);
return ide_stopped;
}
tape->cmd_start_time = jiffies;
ide_set_handler(drive, &idetape_pc_intr, IDETAPE_WAIT_CMD, NULL); /* Set the interrupt routine */
......@@ -2725,7 +2725,7 @@ static ide_startstop_t idetape_do_request (ide_drive_t *drive, struct request *r
idetape_media_access_finished (drive);
return ide_stopped;
} else {
return ide_do_reset (drive);
return ide_stopped;
}
} else if (jiffies - tape->dsc_polling_start > IDETAPE_DSC_MA_THRESHOLD)
tape->dsc_polling_frequency = IDETAPE_DSC_MA_SLOW;
......
......@@ -149,7 +149,7 @@
#include <asm/io.h>
#include <asm/bitops.h>
#include "ide_modes.h"
#include "ata-timing.h"
/*
* Those will be moved into separate header files eventually.
......@@ -194,97 +194,6 @@ extern void buddha_init(void);
extern void pnpide_init(int);
#endif
#ifdef CONFIG_BLK_DEV_IDE_MODES
/*
* Constant tables for PIO mode programming:
*/
const ide_pio_timings_t ide_pio_timings[6] = {
{ 70, 165, 600 }, /* PIO Mode 0 */
{ 50, 125, 383 }, /* PIO Mode 1 */
{ 30, 100, 240 }, /* PIO Mode 2 */
{ 30, 80, 180 }, /* PIO Mode 3 with IORDY */
{ 25, 70, 120 }, /* PIO Mode 4 with IORDY */
{ 20, 50, 100 } /* PIO Mode 5 with IORDY (nonstandard) */
};
/*
* Black list. Some drives incorrectly report their maximal PIO mode,
* at least in respect to CMD640. Here we keep info on some known drives.
*/
static struct ide_pio_info {
const char *name;
int pio;
} ide_pio_blacklist[] = {
/* { "Conner Peripherals 1275MB - CFS1275A", 4 }, */
{ "Conner Peripherals 540MB - CFS540A", 3 },
{ "WDC AC2700", 3 },
{ "WDC AC2540", 3 },
{ "WDC AC2420", 3 },
{ "WDC AC2340", 3 },
{ "WDC AC2250", 0 },
{ "WDC AC2200", 0 },
{ "WDC AC21200", 4 },
{ "WDC AC2120", 0 },
{ "WDC AC2850", 3 },
{ "WDC AC1270", 3 },
{ "WDC AC1170", 1 },
{ "WDC AC1210", 1 },
{ "WDC AC280", 0 },
/* { "WDC AC21000", 4 }, */
{ "WDC AC31000", 3 },
{ "WDC AC31200", 3 },
/* { "WDC AC31600", 4 }, */
{ "Maxtor 7131 AT", 1 },
{ "Maxtor 7171 AT", 1 },
{ "Maxtor 7213 AT", 1 },
{ "Maxtor 7245 AT", 1 },
{ "Maxtor 7345 AT", 1 },
{ "Maxtor 7546 AT", 3 },
{ "Maxtor 7540 AV", 3 },
{ "SAMSUNG SHD-3121A", 1 },
{ "SAMSUNG SHD-3122A", 1 },
{ "SAMSUNG SHD-3172A", 1 },
/* { "ST51080A", 4 },
* { "ST51270A", 4 },
* { "ST31220A", 4 },
* { "ST31640A", 4 },
* { "ST32140A", 4 },
* { "ST3780A", 4 },
*/
{ "ST5660A", 3 },
{ "ST3660A", 3 },
{ "ST3630A", 3 },
{ "ST3655A", 3 },
{ "ST3391A", 3 },
{ "ST3390A", 1 },
{ "ST3600A", 1 },
{ "ST3290A", 0 },
{ "ST3144A", 0 },
{ "ST3491A", 1 }, /* reports 3, should be 1 or 2 (depending on
* drive) according to Seagates FIND-ATA program */
{ "QUANTUM ELS127A", 0 },
{ "QUANTUM ELS170A", 0 },
{ "QUANTUM LPS240A", 0 },
{ "QUANTUM LPS210A", 3 },
{ "QUANTUM LPS270A", 3 },
{ "QUANTUM LPS365A", 3 },
{ "QUANTUM LPS540A", 3 },
{ "QUANTUM LIGHTNING 540A", 3 },
{ "QUANTUM LIGHTNING 730A", 3 },
{ "QUANTUM FIREBALL_540", 3 }, /* Older Quantum Fireballs don't work */
{ "QUANTUM FIREBALL_640", 3 },
{ "QUANTUM FIREBALL_1080", 3 },
{ "QUANTUM FIREBALL_1280", 3 },
{ NULL, 0 }
};
#endif
/* default maximum number of failures */
#define IDE_DEFAULT_MAX_FAILURES 1
......@@ -316,107 +225,6 @@ int noautodma = 0;
*/
ide_hwif_t ide_hwifs[MAX_HWIFS]; /* master data repository */
#ifdef CONFIG_BLK_DEV_IDE_MODES
/*
* This routine searches the ide_pio_blacklist for an entry
* matching the start/whole of the supplied model name.
*
* Returns -1 if no match found.
* Otherwise returns the recommended PIO mode from ide_pio_blacklist[].
*/
int ide_scan_pio_blacklist (char *model)
{
struct ide_pio_info *p;
for (p = ide_pio_blacklist; p->name != NULL; p++) {
if (strncmp(p->name, model, strlen(p->name)) == 0)
return p->pio;
}
return -1;
}
#endif
/*
* This routine returns the recommended PIO settings for a given drive,
* based on the drive->id information and the ide_pio_blacklist[].
* This is used by most chipset support modules when "auto-tuning".
*/
/*
* Drive PIO mode auto selection
*/
byte ide_get_best_pio_mode (ide_drive_t *drive, byte mode_wanted, byte max_mode, ide_pio_data_t *d)
{
int pio_mode;
int cycle_time = 0;
int use_iordy = 0;
struct hd_driveid* id = drive->id;
int overridden = 0;
int blacklisted = 0;
if (mode_wanted != 255) {
pio_mode = mode_wanted;
} else if (!drive->id) {
pio_mode = 0;
} else if ((pio_mode = ide_scan_pio_blacklist(id->model)) != -1) {
overridden = 1;
blacklisted = 1;
use_iordy = (pio_mode > 2);
} else {
pio_mode = id->tPIO;
if (pio_mode > 2) { /* 2 is maximum allowed tPIO value */
pio_mode = 2;
overridden = 1;
}
if (id->field_valid & 2) { /* drive implements ATA2? */
if (id->capability & 8) { /* drive supports use_iordy? */
use_iordy = 1;
cycle_time = id->eide_pio_iordy;
if (id->eide_pio_modes & 7) {
overridden = 0;
if (id->eide_pio_modes & 4)
pio_mode = 5;
else if (id->eide_pio_modes & 2)
pio_mode = 4;
else
pio_mode = 3;
}
} else {
cycle_time = id->eide_pio;
}
}
#if 0
if (drive->id->major_rev_num & 0x0004) printk("ATA-2 ");
#endif
/*
* Conservative "downgrade" for all pre-ATA2 drives
*/
if (pio_mode && pio_mode < 4) {
pio_mode--;
overridden = 1;
#if 0
use_iordy = (pio_mode > 2);
#endif
if (cycle_time && cycle_time < ide_pio_timings[pio_mode].cycle_time)
cycle_time = 0; /* use standard timing */
}
}
if (pio_mode > max_mode) {
pio_mode = max_mode;
cycle_time = 0;
}
if (d) {
d->pio_mode = pio_mode;
d->cycle_time = cycle_time ? cycle_time : ide_pio_timings[pio_mode].cycle_time;
d->use_iordy = use_iordy;
d->overridden = overridden;
d->blacklisted = blacklisted;
}
return pio_mode;
}
#if (DISK_RECOVERY_TIME > 0)
/*
* For really screwed hardware (hey, at least it *can* be used with Linux)
......@@ -887,14 +695,6 @@ static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
return ide_started;
}
/*
* ide_do_reset() is the entry point to the drive/interface reset code.
*/
ide_startstop_t ide_do_reset (ide_drive_t *drive)
{
return do_reset1 (drive, 0);
}
static inline u32 read_24 (ide_drive_t *drive)
{
return (IN_BYTE(IDE_HCYL_REG)<<16) |
......@@ -1118,7 +918,7 @@ ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat)
} else {
if ((rq->errors & ERROR_RESET) == ERROR_RESET) {
++rq->errors;
return ide_do_reset(drive);
return do_reset1(drive, 0);
}
if ((rq->errors & ERROR_RECAL) == ERROR_RECAL)
drive->special.b.recalibrate = 1;
......@@ -2768,27 +2568,6 @@ static int ide_ioctl (struct inode *inode, struct file *file,
}
drive->nice1 = (arg >> IDE_NICE_1) & 1;
return 0;
case HDIO_DRIVE_RESET:
{
unsigned long flags;
ide_hwgroup_t *hwgroup = HWGROUP(drive);
if (!capable(CAP_SYS_ADMIN)) return -EACCES;
#if 1
spin_lock_irqsave(&ide_lock, flags);
if (hwgroup->handler != NULL) {
printk("%s: ide_set_handler: handler not null; %p\n", drive->name, hwgroup->handler);
hwgroup->handler(drive);
hwgroup->timer.expires = jiffies + 0;;
del_timer(&hwgroup->timer);
}
spin_unlock_irqrestore(&ide_lock, flags);
#endif
ide_do_reset(drive);
if (drive->suspend_reset)
return ide_revalidate_disk(inode->i_rdev);
return 0;
}
case BLKGETSIZE:
case BLKGETSIZE64:
case BLKROSET:
......@@ -3492,7 +3271,6 @@ EXPORT_SYMBOL(ide_dump_status);
EXPORT_SYMBOL(ide_error);
EXPORT_SYMBOL(ide_fixstring);
EXPORT_SYMBOL(ide_wait_stat);
EXPORT_SYMBOL(ide_do_reset);
EXPORT_SYMBOL(restart_request);
EXPORT_SYMBOL(ide_init_drive_cmd);
EXPORT_SYMBOL(ide_do_drive_cmd);
......
/*
* linux/drivers/ide/ide_modes.h
*
* Copyright (C) 1996 Linus Torvalds, Igor Abramov, and Mark Lord
*/
#ifndef _IDE_MODES_H
#define _IDE_MODES_H
#include <linux/config.h>
/*
* Shared data/functions for determining best PIO mode for an IDE drive.
*/
#ifdef CONFIG_BLK_DEV_IDE_MODES
/*
* Standard (generic) timings for PIO modes, from ATA2 specification.
* These timings are for access to the IDE data port register *only*.
* Some drives may specify a mode, while also specifying a different
* value for cycle_time (from drive identification data).
*/
typedef struct ide_pio_timings_s {
int setup_time; /* Address setup (ns) minimum */
int active_time; /* Active pulse (ns) minimum */
int cycle_time; /* Cycle time (ns) minimum = (setup + active + recovery) */
} ide_pio_timings_t;
typedef struct ide_pio_data_s {
byte pio_mode;
byte use_iordy;
byte overridden;
byte blacklisted;
unsigned int cycle_time;
} ide_pio_data_t;
extern int ide_scan_pio_blacklist (char *model);
extern byte ide_get_best_pio_mode (ide_drive_t *drive, byte mode_wanted, byte max_mode, ide_pio_data_t *d);
extern const ide_pio_timings_t ide_pio_timings[6];
#endif
#endif
......@@ -41,7 +41,7 @@
#include <asm/io.h>
#include <asm/it8172/it8172_int.h>
#include "ide_modes.h"
#include "ata-timing.h"
/*
* Prototypes
......@@ -64,8 +64,12 @@ static void it8172_tune_drive (ide_drive_t *drive, byte pio)
int is_slave = (&HWIF(drive)->drives[1] == drive);
int master_port = 0x40;
int slave_port = 0x44;
pio = ide_get_best_pio_mode(drive, pio, 5, NULL);
if (pio == 255)
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
else
pio = min_t(byte, pio, 4);
pci_read_config_word(HWIF(drive)->pci_dev, master_port, &master_data);
pci_read_config_dword(HWIF(drive)->pci_dev, slave_port, &slave_data);
......@@ -181,30 +185,12 @@ static int it8172_tune_chipset (ide_drive_t *drive, byte speed)
return err;
}
static int it8172_config_drive_for_dma (ide_drive_t *drive)
static int it8172_config_drive_for_dma(ide_drive_t *drive)
{
struct hd_driveid *id = drive->id;
byte speed;
if (id->dma_ultra & 0x0010) {
speed = XFER_UDMA_2;
} else if (id->dma_ultra & 0x0008) {
speed = XFER_UDMA_1;
} else if (id->dma_ultra & 0x0004) {
speed = XFER_UDMA_2;
} else if (id->dma_ultra & 0x0002) {
speed = XFER_UDMA_1;
} else if (id->dma_ultra & 0x0001) {
speed = XFER_UDMA_0;
} else if (id->dma_mword & 0x0004) {
speed = XFER_MW_DMA_2;
} else if (id->dma_mword & 0x0002) {
speed = XFER_MW_DMA_1;
} else if (id->dma_1word & 0x0004) {
speed = XFER_SW_DMA_2;
} else {
speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL);
}
speed = ata_timing_mode(drive, XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA | XFER_UDMA);
(void) it8172_tune_chipset(drive, speed);
......
......@@ -97,7 +97,7 @@
#include <asm/io.h>
#include "ide_modes.h"
#include "ata-timing.h"
#define OPTI621_MAX_PIO 3
/* In fact, I do not have any PIO 4 drive
......@@ -144,12 +144,16 @@ static void compute_pios(ide_drive_t *drive, byte pio)
int d;
ide_hwif_t *hwif = HWIF(drive);
drive->drive_data = ide_get_best_pio_mode(drive, pio, OPTI621_MAX_PIO, NULL);
if (pio == PIO_DONT_KNOW)
drive->drive_data = min(ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0, OPTI621_MAX_PIO);
else
drive->drive_data = pio;
for (d = 0; d < 2; ++d) {
drive = &hwif->drives[d];
if (drive->present) {
if (drive->drive_data == PIO_DONT_KNOW)
drive->drive_data = ide_get_best_pio_mode(drive, 255, OPTI621_MAX_PIO, NULL);
drive->drive_data = min(ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0, OPTI621_MAX_PIO);
#ifdef OPTI621_DEBUG
printk("%s: Selected PIO mode %d\n", drive->name, drive->drive_data);
#endif
......@@ -210,27 +214,31 @@ typedef struct pio_clocks_s {
static void compute_clocks(int pio, pio_clocks_t *clks)
{
if (pio != PIO_NOT_EXIST) {
int adr_setup, data_pls;
adr_setup = ide_pio_timings[pio].setup_time;
data_pls = ide_pio_timings[pio].active_time;
clks->address_time = cmpt_clk(adr_setup, system_bus_speed);
clks->data_time = cmpt_clk(data_pls, system_bus_speed);
clks->recovery_time = cmpt_clk(ide_pio_timings[pio].cycle_time
- adr_setup-data_pls, system_bus_speed);
if (clks->address_time<1) clks->address_time = 1;
if (clks->address_time>4) clks->address_time = 4;
if (clks->data_time<1) clks->data_time = 1;
if (clks->data_time>16) clks->data_time = 16;
if (clks->recovery_time<2) clks->recovery_time = 2;
if (clks->recovery_time>17) clks->recovery_time = 17;
int adr_setup;
int data_pls;
struct ata_timing *t;
t = ata_timing_data(pio);
adr_setup = t->setup;
data_pls = t->active;
clks->address_time = cmpt_clk(adr_setup, system_bus_speed);
clks->data_time = cmpt_clk(data_pls, system_bus_speed);
clks->recovery_time = cmpt_clk(t->cycle
- adr_setup-data_pls, system_bus_speed);
if (clks->address_time<1) clks->address_time = 1;
if (clks->address_time>4) clks->address_time = 4;
if (clks->data_time<1) clks->data_time = 1;
if (clks->data_time>16) clks->data_time = 16;
if (clks->recovery_time<2) clks->recovery_time = 2;
if (clks->recovery_time>17) clks->recovery_time = 17;
} else {
clks->address_time = 1;
clks->data_time = 1;
clks->recovery_time = 2;
/* minimal values */
}
}
/* Main tune procedure, called from tuneproc. */
......@@ -248,8 +256,8 @@ static void opti621_tune_drive (ide_drive_t *drive, byte pio)
/* sets drive->drive_data for both drives */
compute_pios(drive, pio);
pio1 = hwif->drives[0].drive_data;
pio2 = hwif->drives[1].drive_data;
pio1 = hwif->drives[0].drive_data;
pio2 = hwif->drives[1].drive_data;
compute_clocks(pio1, &first);
compute_clocks(pio2, &second);
......@@ -273,10 +281,10 @@ static void opti621_tune_drive (ide_drive_t *drive, byte pio)
save_flags(flags); /* all CPUs */
cli(); /* all CPUs */
reg_base = hwif->io_ports[IDE_DATA_OFFSET];
reg_base = hwif->io_ports[IDE_DATA_OFFSET];
outb(0xc0, reg_base+CNTRL_REG); /* allow Register-B */
outb(0xff, reg_base+5); /* hmm, setupvic.exe does this ;-) */
inb(reg_base+CNTRL_REG); /* if reads 0xff, adapter not exist? */
inb(reg_base+CNTRL_REG); /* if reads 0xff, adapter not exist? */
read_reg(CNTRL_REG); /* if reads 0xc0, no interface exist? */
read_reg(STRAP_REG); /* read version, probably 0 */
......@@ -293,8 +301,8 @@ static void opti621_tune_drive (ide_drive_t *drive, byte pio)
write_reg(0x85, CNTRL_REG); /* use Register-A for drive 0 */
/* use Register-B for drive 1 */
write_reg(misc, MISC_REG); /* set address setup, DRDY timings, */
/* and read prefetch for both drives */
write_reg(misc, MISC_REG); /* set address setup, DRDY timings, */
/* and read prefetch for both drives */
restore_flags(flags); /* all CPUs */
}
......
......@@ -46,7 +46,7 @@
#include <asm/io.h>
#include <asm/irq.h>
#include "ide_modes.h"
#include "ata-timing.h"
#define PDC202XX_DEBUG_DRIVE_INFO 0
#define PDC202XX_DECODE_REGISTER_INFO 0
......@@ -681,9 +681,11 @@ static int config_chipset_for_pio (ide_drive_t *drive, byte pio)
{
byte speed = 0x00;
pio = (pio == 5) ? 4 : pio;
speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, pio, NULL);
if (pio == 255)
speed = ata_timing_mode(drive, XFER_PIO | XFER_EPIO);
else
speed = XFER_PIO_0 + min_t(byte, pio, 4);
return ((int) pdc202xx_tune_chipset(drive, speed));
}
......
......@@ -551,7 +551,6 @@ ide_startstop_t do_pdc4030_io (ide_drive_t *drive, ide_task_t *task)
{
struct request *rq = HWGROUP(drive)->rq;
task_struct_t *taskfile = (task_struct_t *) task->tfRegister;
ide_startstop_t startstop;
unsigned long timeout;
byte stat;
......
......@@ -24,7 +24,7 @@
#include <asm/io.h>
#include <asm/irq.h>
#include "ide_modes.h"
#include "ata-timing.h"
#undef DISPLAY_PDCADMA_TIMINGS
......
......@@ -65,7 +65,7 @@
#include <asm/io.h>
#include "ide_modes.h"
#include "ata-timing.h"
#define PIIX_DEBUG_DRIVE_INFO 0
......@@ -225,7 +225,11 @@ static void piix_tune_drive (ide_drive_t *drive, byte pio)
{ 2, 1 },
{ 2, 3 }, };
pio = ide_get_best_pio_mode(drive, pio, 5, NULL);
if (pio == 255)
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
else
pio = min_t(byte, pio, 4);
pci_read_config_word(HWIF(drive)->pci_dev, master_port, &master_data);
if (is_slave) {
master_data = master_data | 0x4000;
......@@ -352,27 +356,9 @@ static int piix_config_drive_for_dma (ide_drive_t *drive)
(dev->device == PCI_DEVICE_ID_INTEL_82451NX) ||
(dev->device == PCI_DEVICE_ID_INTEL_82801AB_1)) ? 1 : 0;
if ((id->dma_ultra & 0x0020) && (udma_66) && (ultra100)) {
speed = XFER_UDMA_5;
} else if ((id->dma_ultra & 0x0010) && (ultra)) {
speed = ((udma_66) && (ultra66)) ? XFER_UDMA_4 : XFER_UDMA_2;
} else if ((id->dma_ultra & 0x0008) && (ultra)) {
speed = ((udma_66) && (ultra66)) ? XFER_UDMA_3 : XFER_UDMA_1;
} else if ((id->dma_ultra & 0x0004) && (ultra)) {
speed = XFER_UDMA_2;
} else if ((id->dma_ultra & 0x0002) && (ultra)) {
speed = XFER_UDMA_1;
} else if ((id->dma_ultra & 0x0001) && (ultra)) {
speed = XFER_UDMA_0;
} else if (id->dma_mword & 0x0004) {
speed = XFER_MW_DMA_2;
} else if (id->dma_mword & 0x0002) {
speed = XFER_MW_DMA_1;
} else if (id->dma_1word & 0x0004) {
speed = XFER_SW_DMA_2;
} else {
speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL);
}
speed = ata_timing_mode(drive, XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA
| (ultra ? XFER_UDMA : 0) | ((udma_66 & ultra66) ? XFER_UDMA_66 : 0)
| ((udma_66 & ultra100) ? XFER_UDMA_100 : 0));
(void) piix_tune_chipset(drive, speed);
......@@ -385,7 +371,7 @@ static int piix_config_drive_for_dma (ide_drive_t *drive)
static void config_chipset_for_pio (ide_drive_t *drive)
{
piix_tune_drive(drive, ide_get_best_pio_mode(drive, 255, 5, NULL));
piix_tune_drive(drive, ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0);
}
static int config_drive_xfer_rate (ide_drive_t *drive)
......
......@@ -33,7 +33,7 @@
#include <linux/init.h>
#include <asm/io.h>
#include "ide_modes.h"
#include "ata-timing.h"
#include "qd65xx.h"
/*
......@@ -249,42 +249,46 @@ static void qd6500_tune_drive (ide_drive_t *drive, byte pio)
static void qd6580_tune_drive (ide_drive_t *drive, byte pio)
{
ide_pio_data_t d;
struct ata_timing *t;
int base = HWIF(drive)->select_data;
int active_time = 175;
int recovery_time = 415; /* worst case values from the dos driver */
if (drive->id && !qd_find_disk_type(drive,&active_time,&recovery_time)) {
pio = ide_get_best_pio_mode(drive, pio, 255, &d);
pio = min(pio,4);
if (pio == 255)
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO);
else
pio = XFER_PIO_0 + min_t(byte, pio, 4);
t = ata_timing_data(pio);
switch (pio) {
case 0: break;
case 3:
if (d.cycle_time >= 110) {
if (t->cycle >= 110) {
active_time = 86;
recovery_time = d.cycle_time-102;
recovery_time = t->cycle-102;
} else
printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
break;
case 4:
if (d.cycle_time >= 69) {
if (t->cycle >= 69) {
active_time = 70;
recovery_time = d.cycle_time-61;
recovery_time = t->cycle-61;
} else
printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
break;
default:
if (d.cycle_time >= 180) {
if (t->cycle >= 180) {
active_time = 110;
recovery_time = d.cycle_time - 120;
recovery_time = t->cycle - 120;
} else {
active_time = ide_pio_timings[pio].active_time;
recovery_time = d.cycle_time
-active_time;
active_time = t->active;
recovery_time = t->cycle - active_time;
}
}
printk(KERN_INFO "%s: PIO mode%d\n",drive->name,pio);
printk(KERN_INFO "%s: PIO mode%d\n", drive->name, pio - XFER_PIO_0);
}
if (!HWIF(drive)->channel && drive->type != ATA_DISK) {
......
......@@ -91,7 +91,7 @@
#include <asm/io.h>
#include "ide_modes.h"
#include "ata-timing.h"
#define DISPLAY_SVWKS_TIMINGS 1
#undef SVWKS_DEBUG_DRIVE_INFO
......@@ -263,7 +263,7 @@ static int svwks_tune_chipset (ide_drive_t *drive, byte speed)
byte pio_timing = 0x00;
unsigned short csb5_pio = 0x00;
byte pio = ide_get_best_pio_mode(drive, 255, 5, NULL);
byte pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
switch (drive->dn) {
case 0: drive_pci = 0x41; drive_pci2 = 0x45; break;
......@@ -364,9 +364,9 @@ static void config_chipset_for_pio (ide_drive_t *drive)
unsigned short xfer_pio = drive->id->eide_pio_modes;
byte timing, speed, pio;
pio = ide_get_best_pio_mode(drive, 255, 5, NULL);
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
if (xfer_pio> 4)
if (xfer_pio > 4)
xfer_pio = 0;
if (drive->id->eide_pio_iordy > 0)
......@@ -416,30 +416,11 @@ static int config_chipset_for_dma (ide_drive_t *drive)
struct pci_dev *dev = HWIF(drive)->pci_dev;
byte udma_66 = eighty_ninty_three(drive);
int ultra66 = (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) ? 1 : 0;
int ultra100 = (ultra66 && svwks_revision >= SVWKS_CSB5_REVISION_NEW) ? 1 : 0;
byte speed;
int ultra100 = (ultra66 && svwks_revision >= SVWKS_CSB5_REVISION_NEW) ? 1 : 0;
if ((id->dma_ultra & 0x0020) && (udma_66) && (ultra100)) {
speed = XFER_UDMA_5;
} else if (id->dma_ultra & 0x0010) {
speed = ((udma_66) && (ultra66)) ? XFER_UDMA_4 : XFER_UDMA_2;
} else if (id->dma_ultra & 0x0008) {
speed = ((udma_66) && (ultra66)) ? XFER_UDMA_3 : XFER_UDMA_1;
} else if (id->dma_ultra & 0x0004) {
speed = XFER_UDMA_2;
} else if (id->dma_ultra & 0x0002) {
speed = XFER_UDMA_1;
} else if (id->dma_ultra & 0x0001) {
speed = XFER_UDMA_0;
} else if (id->dma_mword & 0x0004) {
speed = XFER_MW_DMA_2;
} else if (id->dma_mword & 0x0002) {
speed = XFER_MW_DMA_1;
} else if (id->dma_1word & 0x0004) {
speed = XFER_SW_DMA_2;
} else {
speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL);
}
byte speed = ata_timing_mode(drive, XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA | XFER_UDMA
| ((udma_66 && ultra66) ? XFER_UDMA_66 : 0)
| ((udma_66 && ultra100) ? XFER_UDMA_100 : 0));
(void) svwks_tune_chipset(drive, speed);
......
......@@ -50,7 +50,7 @@
#include <asm/io.h>
#include <asm/irq.h>
#include "ide_modes.h"
#include "ata-timing.h"
// #define DEBUG
/* if BROKEN_LEVEL is defined it limits the DMA mode
......@@ -473,7 +473,9 @@ static void config_art_rwp_pio (ide_drive_t *drive, byte pio)
#endif
config_drive_art_rwp(drive);
pio = ide_get_best_pio_mode(drive, 255, pio, NULL);
if (pio == 255)
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
if (xfer_pio> 4)
xfer_pio = 0;
......
......@@ -22,7 +22,7 @@
#include <asm/io.h>
#include <asm/dma.h>
#include "ide_modes.h"
#include "ata-timing.h"
extern char *ide_xfer_verbose (byte xfer_rate);
......@@ -31,13 +31,13 @@ extern char *ide_xfer_verbose (byte xfer_rate);
* times for the interface. This has protection against run-away
* timings.
*/
static unsigned int get_timing_sl82c105(ide_pio_data_t *p)
static unsigned int get_timing_sl82c105(struct ata_timing *t)
{
unsigned int cmd_on;
unsigned int cmd_off;
cmd_on = (ide_pio_timings[p->pio_mode].active_time + 29) / 30;
cmd_off = (p->cycle_time - 30 * cmd_on + 29) / 30;
cmd_on = (t->active + 29) / 30;
cmd_off = (t->cycle - 30 * cmd_on + 29) / 30;
if (cmd_on > 32)
cmd_on = 32;
......@@ -49,7 +49,7 @@ static unsigned int get_timing_sl82c105(ide_pio_data_t *p)
if (cmd_off == 0)
cmd_off = 1;
return (cmd_on - 1) << 8 | (cmd_off - 1) | (p->use_iordy ? 0x40 : 0x00);
return (cmd_on - 1) << 8 | (cmd_off - 1) | ((t->mode > XFER_PIO_2) ? 0x40 : 0x00);
}
/*
......@@ -59,25 +59,21 @@ static void config_for_pio(ide_drive_t *drive, int pio, int report)
{
ide_hwif_t *hwif = HWIF(drive);
struct pci_dev *dev = hwif->pci_dev;
ide_pio_data_t p;
struct ata_timing *t;
unsigned short drv_ctrl = 0x909;
unsigned int xfer_mode, reg;
reg = (hwif->channel ? 0x4c : 0x44) + (drive->select.b.unit ? 4 : 0);
pio = ide_get_best_pio_mode(drive, pio, 5, &p);
if (pio == 255)
xfer_mode = ata_timing_mode(drive, XFER_PIO | XFER_EPIO);
else
xfer_mode = XFER_PIO_0 + min_t(byte, pio, 4);
switch (pio) {
default:
case 0: xfer_mode = XFER_PIO_0; break;
case 1: xfer_mode = XFER_PIO_1; break;
case 2: xfer_mode = XFER_PIO_2; break;
case 3: xfer_mode = XFER_PIO_3; break;
case 4: xfer_mode = XFER_PIO_4; break;
}
t = ata_timing_data(xfer_mode);
if (ide_config_drive_speed(drive, xfer_mode) == 0)
drv_ctrl = get_timing_sl82c105(&p);
drv_ctrl = get_timing_sl82c105(t);
if (drive->using_dma == 0) {
/*
......@@ -89,7 +85,7 @@ static void config_for_pio(ide_drive_t *drive, int pio, int report)
if (report) {
printk("%s: selected %s (%dns) (%04X)\n", drive->name,
ide_xfer_verbose(xfer_mode), p.cycle_time, drv_ctrl);
ide_xfer_verbose(xfer_mode), t->cycle, drv_ctrl);
}
}
}
......
......@@ -48,7 +48,7 @@
#include <asm/io.h>
#include "ide_modes.h"
#include "ata-timing.h"
#define SLC90E66_DEBUG_DRIVE_INFO 0
......@@ -202,7 +202,11 @@ static void slc90e66_tune_drive (ide_drive_t *drive, byte pio)
{ 2, 1 },
{ 2, 3 }, };
pio = ide_get_best_pio_mode(drive, pio, 5, NULL);
if (pio == 255)
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
else
pio = min_t(byte, pio, 4);
pci_read_config_word(HWIF(drive)->pci_dev, master_port, &master_data);
if (is_slave) {
master_data = master_data | 0x4000;
......@@ -299,30 +303,14 @@ static int slc90e66_config_drive_for_dma (ide_drive_t *drive)
#if 1 /* allow PIO modes */
if (!HWIF(drive)->autodma) {
speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL);
speed = ata_timing_mode(drive, XFER_PIO | XFER_EPIO);
(void) slc90e66_tune_chipset(drive, speed);
return ((int) ide_dma_off_quietly);
}
#endif
if ((id->dma_ultra & 0x0010) && (ultra)) {
speed = (udma_66) ? XFER_UDMA_4 : XFER_UDMA_2;
} else if ((id->dma_ultra & 0x0008) && (ultra)) {
speed = (udma_66) ? XFER_UDMA_3 : XFER_UDMA_1;
} else if ((id->dma_ultra & 0x0004) && (ultra)) {
speed = XFER_UDMA_2;
} else if ((id->dma_ultra & 0x0002) && (ultra)) {
speed = XFER_UDMA_1;
} else if ((id->dma_ultra & 0x0001) && (ultra)) {
speed = XFER_UDMA_0;
} else if (id->dma_mword & 0x0004) {
speed = XFER_MW_DMA_2;
} else if (id->dma_mword & 0x0002) {
speed = XFER_MW_DMA_1;
} else if (id->dma_1word & 0x0004) {
speed = XFER_SW_DMA_2;
} else {
speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL);
}
speed = ata_timing_mode(drive, XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA
| (ultra ? XFER_UDMA : 0) | ((ultra && udma_66) ? XFER_UDMA_66 : 0));
(void) slc90e66_tune_chipset(drive, speed);
......
......@@ -52,7 +52,7 @@
#include <asm/io.h>
#include "ide_modes.h"
#include "ata-timing.h"
/*
* Default speeds. These can be changed with "auto-tune" and/or hdparm.
......@@ -113,7 +113,11 @@ static void tune_umc (ide_drive_t *drive, byte pio)
unsigned long flags;
ide_hwgroup_t *hwgroup = ide_hwifs[HWIF(drive)->index^1].hwgroup;
pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
if (pio == 255)
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
else
pio = min_t(byte, pio, 4);
printk("%s: setting umc8672 to PIO mode%d (speed %d)\n", drive->name, pio, pio_to_umc[pio]);
save_flags(flags); /* all CPUs */
cli(); /* all CPUs */
......
......@@ -67,7 +67,7 @@
#include <linux/ide.h>
#include <asm/io.h>
#include "ide-timing.h"
#include "ata-timing.h"
#define VIA_IDE_ENABLE 0x40
#define VIA_IDE_CONFIG 0x41
......@@ -269,7 +269,7 @@ static int via_get_info(char *buffer, char **addr, off_t offset, int count)
* via_set_speed() writes timing values to the chipset registers
*/
static void via_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timing *timing)
static void via_set_speed(struct pci_dev *dev, unsigned char dn, struct ata_timing *timing)
{
unsigned char t;
......@@ -303,7 +303,7 @@ static void via_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi
static int via_set_drive(ide_drive_t *drive, unsigned char speed)
{
ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
struct ide_timing t, p;
struct ata_timing t, p;
unsigned int T, UT;
if (speed != XFER_PIO_SLOW && speed != drive->current_speed)
......@@ -321,11 +321,11 @@ static int via_set_drive(ide_drive_t *drive, unsigned char speed)
default: UT = T;
}
ide_timing_compute(drive, speed, &t, T, UT);
ata_timing_compute(drive, speed, &t, T, UT);
if (peer->present) {
ide_timing_compute(peer, peer->current_speed, &p, T, UT);
ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
ata_timing_compute(peer, peer->current_speed, &p, T, UT);
ata_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
}
via_set_speed(HWIF(drive)->pci_dev, drive->dn, &t);
......@@ -348,11 +348,11 @@ static void via82cxxx_tune_drive(ide_drive_t *drive, unsigned char pio)
return;
if (pio == 255) {
via_set_drive(drive, ide_find_best_mode(drive, XFER_PIO | XFER_EPIO));
via_set_drive(drive, ata_timing_mode(drive, XFER_PIO | XFER_EPIO));
return;
}
via_set_drive(drive, XFER_PIO_0 + MIN(pio, 5));
via_set_drive(drive, XFER_PIO_0 + min_t(byte, pio, 5));
}
#ifdef CONFIG_BLK_DEV_IDEDMA
......@@ -370,7 +370,7 @@ int via82cxxx_dmaproc(ide_dma_action_t func, ide_drive_t *drive)
short w80 = HWIF(drive)->udma_four;
short speed = ide_find_best_mode(drive,
short speed = ata_timing_mode(drive,
XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA |
(via_config->flags & VIA_UDMA ? XFER_UDMA : 0) |
(w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_66 ? XFER_UDMA_66 : 0) |
......
......@@ -350,7 +350,7 @@ static ide_startstop_t idescsi_pc_intr (ide_drive_t *drive)
if (ireason & IDESCSI_IREASON_COD) {
printk (KERN_ERR "ide-scsi: CoD != 0 in idescsi_pc_intr\n");
return ide_do_reset (drive);
return ide_stopped;
}
if (ireason & IDESCSI_IREASON_IO) {
temp = pc->actually_transferred + bcount;
......@@ -411,7 +411,7 @@ static ide_startstop_t idescsi_transfer_pc (ide_drive_t *drive)
ireason = IN_BYTE (IDE_IREASON_REG);
if ((ireason & (IDESCSI_IREASON_IO | IDESCSI_IREASON_COD)) != IDESCSI_IREASON_COD) {
printk (KERN_ERR "ide-scsi: (IO,CoD) != (0,1) while issuing a packet command\n");
return ide_do_reset (drive);
return ide_stopped;
}
ide_set_handler(drive, &idescsi_pc_intr, get_timeout(pc), NULL); /* Set the interrupt routine */
atapi_output_bytes (drive, scsi->pc->c, 12); /* Send the actual packet */
......
......@@ -354,7 +354,6 @@ struct hd_big_geometry {
#define HDIO_GET_BUSSTATE 0x031a /* get the bus state of the hwif */
#define HDIO_TRISTATE_HWIF 0x031b /* execute a channel tristate */
#define HDIO_DRIVE_RESET 0x031c /* execute a device reset */
#define HDIO_DRIVE_TASK 0x031e /* execute task and special drive command */
#define HDIO_DRIVE_CMD 0x031f /* execute a special drive command */
......
......@@ -745,12 +745,6 @@ int ide_xlate_1024 (kdev_t, int, int, const char *);
*/
ide_drive_t *get_info_ptr (kdev_t i_rdev);
/*
* Start a reset operation for an IDE interface.
* The caller should return immediately after invoking this.
*/
ide_startstop_t ide_do_reset (ide_drive_t *);
/*
* Re-Start an operation for an IDE interface.
* The caller should return immediately after invoking this.
......@@ -953,7 +947,7 @@ void ide_destroy_dmatable (ide_drive_t *drive);
ide_startstop_t ide_dma_intr (ide_drive_t *drive);
int check_drive_lists (ide_drive_t *drive, int good_bad);
int ide_dmaproc (ide_dma_action_t func, ide_drive_t *drive);
int ide_release_dma (ide_hwif_t *hwif);
extern void ide_release_dma(ide_hwif_t *hwif);
void ide_setup_dma (ide_hwif_t *hwif, unsigned long dmabase, unsigned int num_ports) __init;
#endif
......
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