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nexedi
linux
Commits
16c4f227
Commit
16c4f227
authored
Nov 05, 2013
by
Ben Skeggs
Browse files
Options
Browse Files
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Email Patches
Plain Diff
drm/nouveau/fifo: make external class definitions into pointers
Signed-off-by:
Ben Skeggs
<
bskeggs@redhat.com
>
parent
aabf19c2
Changes
17
Hide whitespace changes
Inline
Side-by-side
Showing
17 changed files
with
86 additions
and
86 deletions
+86
-86
drivers/gpu/drm/nouveau/core/engine/device/nv04.c
drivers/gpu/drm/nouveau/core/engine/device/nv04.c
+2
-2
drivers/gpu/drm/nouveau/core/engine/device/nv10.c
drivers/gpu/drm/nouveau/core/engine/device/nv10.c
+7
-7
drivers/gpu/drm/nouveau/core/engine/device/nv20.c
drivers/gpu/drm/nouveau/core/engine/device/nv20.c
+4
-4
drivers/gpu/drm/nouveau/core/engine/device/nv30.c
drivers/gpu/drm/nouveau/core/engine/device/nv30.c
+5
-5
drivers/gpu/drm/nouveau/core/engine/device/nv40.c
drivers/gpu/drm/nouveau/core/engine/device/nv40.c
+16
-16
drivers/gpu/drm/nouveau/core/engine/device/nv50.c
drivers/gpu/drm/nouveau/core/engine/device/nv50.c
+14
-14
drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
+9
-9
drivers/gpu/drm/nouveau/core/engine/device/nve0.c
drivers/gpu/drm/nouveau/core/engine/device/nve0.c
+5
-5
drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
+2
-2
drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c
drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c
+2
-2
drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c
drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c
+2
-2
drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c
drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c
+2
-2
drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c
drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c
+2
-2
drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c
drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c
+2
-2
drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
+2
-2
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c
+2
-2
drivers/gpu/drm/nouveau/core/include/engine/fifo.h
drivers/gpu/drm/nouveau/core/include/engine/fifo.h
+8
-8
No files found.
drivers/gpu/drm/nouveau/core/engine/device/nv04.c
View file @
16c4f227
...
...
@@ -57,7 +57,7 @@ nv04_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv04_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv04_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv04_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv04_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
@@ -75,7 +75,7 @@ nv04_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv04_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv04_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv04_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv04_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv10.c
View file @
16c4f227
...
...
@@ -76,7 +76,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv10_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv10_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
@@ -95,7 +95,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv10_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv10_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
@@ -114,7 +114,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv10_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv10_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
@@ -133,7 +133,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv10_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv10_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
@@ -152,7 +152,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
@@ -171,7 +171,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
@@ -190,7 +190,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv20.c
View file @
16c4f227
...
...
@@ -60,7 +60,7 @@ nv20_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv20_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
@@ -79,7 +79,7 @@ nv20_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv25_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
@@ -98,7 +98,7 @@ nv20_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv25_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
@@ -117,7 +117,7 @@ nv20_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv2a_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv30.c
View file @
16c4f227
...
...
@@ -60,7 +60,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv30_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
@@ -79,7 +79,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv35_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nv04_disp_oclass
;
...
...
@@ -98,7 +98,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv30_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv31_mpeg_oclass
;
...
...
@@ -118,7 +118,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv35_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv31_mpeg_oclass
;
...
...
@@ -138,7 +138,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv34_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv31_mpeg_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv40.c
View file @
16c4f227
...
...
@@ -63,7 +63,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv40_mpeg_oclass
;
...
...
@@ -84,7 +84,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv40_mpeg_oclass
;
...
...
@@ -105,7 +105,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv40_mpeg_oclass
;
...
...
@@ -126,7 +126,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv40_mpeg_oclass
;
...
...
@@ -147,7 +147,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv44_mpeg_oclass
;
...
...
@@ -168,7 +168,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv44_mpeg_oclass
;
...
...
@@ -189,7 +189,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv44_mpeg_oclass
;
...
...
@@ -210,7 +210,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv44_mpeg_oclass
;
...
...
@@ -231,7 +231,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv44_mpeg_oclass
;
...
...
@@ -252,7 +252,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv44_mpeg_oclass
;
...
...
@@ -273,7 +273,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv44_mpeg_oclass
;
...
...
@@ -294,7 +294,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv44_mpeg_oclass
;
...
...
@@ -315,7 +315,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv44_mpeg_oclass
;
...
...
@@ -336,7 +336,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv44_mpeg_oclass
;
...
...
@@ -357,7 +357,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv44_mpeg_oclass
;
...
...
@@ -378,7 +378,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv44_mpeg_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv50.c
View file @
16c4f227
...
...
@@ -71,7 +71,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv50_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv50_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv50_mpeg_oclass
;
...
...
@@ -94,7 +94,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv84_mpeg_oclass
;
...
...
@@ -120,7 +120,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv84_mpeg_oclass
;
...
...
@@ -146,7 +146,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv84_mpeg_oclass
;
...
...
@@ -172,7 +172,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv84_mpeg_oclass
;
...
...
@@ -198,7 +198,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv84_mpeg_oclass
;
...
...
@@ -224,7 +224,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nv98_vp_oclass
;
...
...
@@ -250,7 +250,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv84_mpeg_oclass
;
...
...
@@ -276,7 +276,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nv98_vp_oclass
;
...
...
@@ -302,7 +302,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nv98_vp_oclass
;
...
...
@@ -328,7 +328,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_MPEG
]
=
&
nv84_mpeg_oclass
;
...
...
@@ -355,7 +355,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nv98_vp_oclass
;
...
...
@@ -381,7 +381,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nv98_vp_oclass
;
...
...
@@ -407,7 +407,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nv98_vp_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
View file @
16c4f227
...
...
@@ -73,7 +73,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc0_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nvc0_vp_oclass
;
...
...
@@ -102,7 +102,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc3_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nvc0_vp_oclass
;
...
...
@@ -131,7 +131,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc3_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nvc0_vp_oclass
;
...
...
@@ -159,7 +159,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc3_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nvc0_vp_oclass
;
...
...
@@ -188,7 +188,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc3_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nvc0_vp_oclass
;
...
...
@@ -217,7 +217,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc1_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nvc0_vp_oclass
;
...
...
@@ -245,7 +245,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc8_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nvc0_vp_oclass
;
...
...
@@ -274,7 +274,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvd9_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nvc0_vp_oclass
;
...
...
@@ -302,7 +302,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvd7_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_VP
]
=
&
nvc0_vp_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nve0.c
View file @
16c4f227
...
...
@@ -73,7 +73,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nve0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nve0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nve4_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nve0_disp_oclass
;
...
...
@@ -103,7 +103,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nve0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nve0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nve4_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nve0_disp_oclass
;
...
...
@@ -133,7 +133,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nve0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nve0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nve4_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nve0_disp_oclass
;
...
...
@@ -163,7 +163,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
&
nve0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nve0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvf0_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
&
nvf0_disp_oclass
;
...
...
@@ -196,7 +196,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
#if 0
device->oclass[NVDEV_ENGINE_FIFO ] =
&
nve0_fifo_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] =
nve0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvf0_graph_oclass;
#endif
...
...
drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
View file @
16c4f227
...
...
@@ -632,8 +632,8 @@ nv04_fifo_init(struct nouveau_object *object)
return
0
;
}
struct
nouveau_oclass
nv04_fifo_oclass
=
{
struct
nouveau_oclass
*
nv04_fifo_oclass
=
&
(
struct
nouveau_oclass
)
{
.
handle
=
NV_ENGINE
(
FIFO
,
0x04
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv04_fifo_ctor
,
...
...
drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c
View file @
16c4f227
...
...
@@ -159,8 +159,8 @@ nv10_fifo_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
return
0
;
}
struct
nouveau_oclass
nv10_fifo_oclass
=
{
struct
nouveau_oclass
*
nv10_fifo_oclass
=
&
(
struct
nouveau_oclass
)
{
.
handle
=
NV_ENGINE
(
FIFO
,
0x10
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv10_fifo_ctor
,
...
...
drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c
View file @
16c4f227
...
...
@@ -196,8 +196,8 @@ nv17_fifo_init(struct nouveau_object *object)
return
0
;
}
struct
nouveau_oclass
nv17_fifo_oclass
=
{
struct
nouveau_oclass
*
nv17_fifo_oclass
=
&
(
struct
nouveau_oclass
)
{
.
handle
=
NV_ENGINE
(
FIFO
,
0x17
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv17_fifo_ctor
,
...
...
drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c
View file @
16c4f227
...
...
@@ -337,8 +337,8 @@ nv40_fifo_init(struct nouveau_object *object)
return
0
;
}
struct
nouveau_oclass
nv40_fifo_oclass
=
{
struct
nouveau_oclass
*
nv40_fifo_oclass
=
&
(
struct
nouveau_oclass
)
{
.
handle
=
NV_ENGINE
(
FIFO
,
0x40
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv40_fifo_ctor
,
...
...
drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c
View file @
16c4f227
...
...
@@ -502,8 +502,8 @@ nv50_fifo_init(struct nouveau_object *object)
return
0
;
}
struct
nouveau_oclass
nv50_fifo_oclass
=
{
struct
nouveau_oclass
*
nv50_fifo_oclass
=
&
(
struct
nouveau_oclass
)
{
.
handle
=
NV_ENGINE
(
FIFO
,
0x50
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv50_fifo_ctor
,
...
...
drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c
View file @
16c4f227
...
...
@@ -435,8 +435,8 @@ nv84_fifo_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
return
0
;
}
struct
nouveau_oclass
nv84_fifo_oclass
=
{
struct
nouveau_oclass
*
nv84_fifo_oclass
=
&
(
struct
nouveau_oclass
)
{
.
handle
=
NV_ENGINE
(
FIFO
,
0x84
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv84_fifo_ctor
,
...
...
drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
View file @
16c4f227
...
...
@@ -720,8 +720,8 @@ nvc0_fifo_init(struct nouveau_object *object)
return
0
;
}
struct
nouveau_oclass
nvc0_fifo_oclass
=
{
struct
nouveau_oclass
*
nvc0_fifo_oclass
=
&
(
struct
nouveau_oclass
)
{
.
handle
=
NV_ENGINE
(
FIFO
,
0xc0
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nvc0_fifo_ctor
,
...
...
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c
View file @
16c4f227
...
...
@@ -675,8 +675,8 @@ nve0_fifo_init(struct nouveau_object *object)
return
0
;
}
struct
nouveau_oclass
nve0_fifo_oclass
=
{
struct
nouveau_oclass
*
nve0_fifo_oclass
=
&
(
struct
nouveau_oclass
)
{
.
handle
=
NV_ENGINE
(
FIFO
,
0xe0
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nve0_fifo_ctor
,
...
...
drivers/gpu/drm/nouveau/core/include/engine/fifo.h
View file @
16c4f227
...
...
@@ -101,14 +101,14 @@ nouveau_client_name_for_fifo_chid(struct nouveau_fifo *fifo, u32 chid);
#define _nouveau_fifo_init _nouveau_engine_init
#define _nouveau_fifo_fini _nouveau_engine_fini
extern
struct
nouveau_oclass
nv04_fifo_oclass
;
extern
struct
nouveau_oclass
nv10_fifo_oclass
;
extern
struct
nouveau_oclass
nv17_fifo_oclass
;
extern
struct
nouveau_oclass
nv40_fifo_oclass
;
extern
struct
nouveau_oclass
nv50_fifo_oclass
;
extern
struct
nouveau_oclass
nv84_fifo_oclass
;
extern
struct
nouveau_oclass
nvc0_fifo_oclass
;
extern
struct
nouveau_oclass
nve0_fifo_oclass
;
extern
struct
nouveau_oclass
*
nv04_fifo_oclass
;
extern
struct
nouveau_oclass
*
nv10_fifo_oclass
;
extern
struct
nouveau_oclass
*
nv17_fifo_oclass
;
extern
struct
nouveau_oclass
*
nv40_fifo_oclass
;
extern
struct
nouveau_oclass
*
nv50_fifo_oclass
;
extern
struct
nouveau_oclass
*
nv84_fifo_oclass
;
extern
struct
nouveau_oclass
*
nvc0_fifo_oclass
;
extern
struct
nouveau_oclass
*
nve0_fifo_oclass
;
void
nv04_fifo_intr
(
struct
nouveau_subdev
*
);
int
nv04_fifo_context_attach
(
struct
nouveau_object
*
,
struct
nouveau_object
*
);
...
...
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