Commit 16d2812e authored by Arend van Spriel's avatar Arend van Spriel Committed by John W. Linville

brcm80211: smac: use bcma core register access functions for 802.11 core

The driver now uses the bcma register access functions to read and
write the registers on the 802.11 core. The dma and phy code need
to be modified next and access to the other cores. That will be done
in coming patches.
Reviewed-by: default avatarPieter-Paul Giesberts <pieterpg@broadcom.com>
Reviewed-by: default avatarAlwin Beukers <alwin@broadcom.com>
Signed-off-by: default avatarArend van Spriel <arend@broadcom.com>
Signed-off-by: default avatarFranky Lin <frankyl@broadcom.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 5204563a
......@@ -504,6 +504,17 @@ static void ai_scan(struct si_pub *sih, struct bcma_bus *bus)
}
}
static struct bcma_device *ai_find_bcma_core(struct si_pub *sih, uint coreidx)
{
struct si_info *sii = (struct si_info *)sih;
struct bcma_device *core;
list_for_each_entry(core, &sii->icbus->cores, list) {
if (core->core_index == coreidx)
return core;
}
return NULL;
}
/*
* This function changes the logical "focus" to the indicated core.
* Return the current core's virtual address. Since each core starts with the
......@@ -514,18 +525,16 @@ static void ai_scan(struct si_pub *sih, struct bcma_bus *bus)
void __iomem *ai_setcoreidx(struct si_pub *sih, uint coreidx)
{
struct si_info *sii = (struct si_info *)sih;
u32 addr = sii->coresba[coreidx];
u32 wrap = sii->wrapba[coreidx];
if (coreidx >= sii->numcores)
return NULL;
struct bcma_device *core;
/* point bar0 window */
pci_write_config_dword(sii->pcibus, PCI_BAR0_WIN, addr);
/* point bar0 2nd 4KB window */
pci_write_config_dword(sii->pcibus, PCI_BAR0_WIN2, wrap);
sii->curidx = coreidx;
if (sii->curidx != coreidx) {
core = ai_find_bcma_core(sih, coreidx);
if (core == NULL)
return NULL;
(void)bcma_aread32(core, BCMA_IOST);
sii->curidx = coreidx;
}
return sii->curmap;
}
......@@ -811,8 +820,6 @@ static struct si_info *ai_doattach(struct si_info *sii,
uint socitype;
uint origidx;
/* assume the window is looking at chipcommon */
WARN_ON(pbus->mapped_core->id.id != BCMA_CORE_CHIPCOMMON);
memset((unsigned char *) sii, 0, sizeof(struct si_info));
savewin = 0;
......@@ -823,13 +830,10 @@ static struct si_info *ai_doattach(struct si_info *sii,
sii->curmap = regs;
sii->curwrap = sii->curmap + SI_CORE_SIZE;
/* find Chipcommon address */
pci_read_config_dword(sii->pcibus, PCI_BAR0_WIN, &savewin);
if (!GOODCOREADDR(savewin, SI_ENUM_BASE))
savewin = SI_ENUM_BASE;
/* switch to Chipcommon core */
bcma_read32(pbus->drv_cc.core, 0);
savewin = SI_ENUM_BASE;
pci_write_config_dword(sii->pcibus, PCI_BAR0_WIN,
SI_ENUM_BASE);
cc = (struct chipcregs __iomem *) regs;
/* bus/core/clk setup for register access */
......@@ -1036,18 +1040,18 @@ bool ai_backplane64(struct si_pub *sih)
/* return index of coreid or BADIDX if not found */
uint ai_findcoreidx(struct si_pub *sih, uint coreid, uint coreunit)
{
struct bcma_device *core;
struct si_info *sii;
uint found;
uint i;
sii = (struct si_info *)sih;
found = 0;
for (i = 0; i < sii->numcores; i++)
if (sii->coreid[i] == coreid) {
list_for_each_entry(core, &sii->icbus->cores, list)
if (core->id.id == coreid) {
if (found == coreunit)
return i;
return core->core_index;
found++;
}
......
......@@ -1118,14 +1118,17 @@ brcms_c_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb,
u8 status_delay = 0;
/* wait till the next 8 bytes of txstatus is available */
while (((s1 = R_REG(&wlc->regs->frmtxstatus)) & TXS_V) == 0) {
s1 = bcma_read32(wlc->hw->d11core, D11REGOFFS(frmtxstatus));
while ((s1 & TXS_V) == 0) {
udelay(1);
status_delay++;
if (status_delay > 10)
return; /* error condition */
s1 = bcma_read32(wlc->hw->d11core,
D11REGOFFS(frmtxstatus));
}
s2 = R_REG(&wlc->regs->frmtxstatus2);
s2 = bcma_read32(wlc->hw->d11core, D11REGOFFS(frmtxstatus2));
}
if (scb) {
......
......@@ -430,6 +430,9 @@ struct d11regs {
u16 PAD[0x380]; /* 0x800 - 0xEFE */
};
/* d11 register field offset */
#define D11REGOFFS(field) offsetof(struct d11regs, field)
#define PIHR_BASE 0x0400 /* byte address of packed IHR region */
/* biststatus */
......
......@@ -334,7 +334,7 @@ struct brcms_hardware {
u32 machwcap_backup; /* backup of machwcap */
struct si_pub *sih; /* SI handle (cookie for siutils calls) */
struct d11regs __iomem *regs; /* pointer to device registers */
struct bcma_device *d11core; /* pointer to 802.11 core */
struct phy_shim_info *physhim; /* phy shim layer handler */
struct shared_phy *phy_sh; /* pointer to shared phy state */
struct brcms_hw_band *band;/* pointer to active per-band state */
......@@ -400,7 +400,6 @@ struct brcms_txq_info {
*
* pub: pointer to driver public state.
* wl: pointer to specific private state.
* regs: pointer to device registers.
* hw: HW related state.
* clkreq_override: setting for clkreq for PCIE : Auto, 0, 1.
* fastpwrup_dly: time in us needed to bring up d11 fast clock.
......@@ -477,7 +476,6 @@ struct brcms_txq_info {
struct brcms_c_info {
struct brcms_pub *pub;
struct brcms_info *wl;
struct d11regs __iomem *regs;
struct brcms_hardware *hw;
/* clock */
......
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