Commit 18064b09 authored by Matthew Wilcox's avatar Matthew Wilcox Committed by James Bottomley

[PATCH] Kill off sym1

 - Remove sym1 driver
 - Remove PCI stuff from sym53c8xx_comm.h
 - Remove PCI stuff from ncr53c8xx.c
 - Remove device_t typedef
 - Remove u_int32 and u_int64
 - Remove first_host and the_template
 - Remove SPARC support (get back to me when someone puts a 720 in a Sparc :-P)

 Makefile         |    1
 NCR_Q720.c       |    4
 ncr53c8xx.c      |  155
 ncr53c8xx.h      |   12
 sym53c8xx.c      |14543 -------------------------------------------------------
 sym53c8xx.h      |   82
 sym53c8xx_comm.h |  666 --
 sym53c8xx_defs.h |   52
 zalon.c          |    4
 9 files changed, 76 insertions(+), 15443 deletions(-)
parent 3d8f02bd
......@@ -81,7 +81,6 @@ obj-$(CONFIG_SCSI_T128) += t128.o
obj-$(CONFIG_SCSI_DMX3191D) += dmx3191d.o
obj-$(CONFIG_SCSI_DTC3280) += dtc.o
obj-$(CONFIG_SCSI_SYM53C8XX_2) += sym53c8xx_2/
obj-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
obj-$(CONFIG_SCSI_ZALON) += zalon7xx.o
obj-$(CONFIG_SCSI_EATA_PIO) += eata_pio.o
obj-$(CONFIG_SCSI_7000FASST) += wd7000.o
......
......@@ -79,7 +79,7 @@ static int __init
NCR_Q720_probe_one(struct NCR_Q720_private *p, int siop,
int irq, int slot, __u32 paddr, __u32 vaddr)
{
ncr_device device;
struct ncr_device device;
__u8 scsi_id;
static int unit = 0;
__u8 scsr1 = readb(vaddr + NCR_Q720_SCSR_OFFSET + 1);
......@@ -96,7 +96,7 @@ NCR_Q720_probe_one(struct NCR_Q720_private *p, int siop,
udelay(10);
version = readb(vaddr + 0x18) >> 4;
memset(&device, 0, sizeof(ncr_device));
memset(&device, 0, sizeof(struct ncr_device));
/* Initialise ncr_device structure with items required by ncr_attach. */
device.chip = q720_chip;
device.chip.revision_id = version;
......
......@@ -124,7 +124,6 @@
#include <linux/ioport.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/sched.h>
#include <linux/signal.h>
#include <linux/spinlock.h>
......@@ -242,9 +241,9 @@ const char *ncr53c8xx_info (struct Scsi_Host *host);
** Choose appropriate type for tag bitmap.
*/
#if MAX_TAGS > 32
typedef u_int64 tagmap_t;
typedef u64 tagmap_t;
#else
typedef u_int32 tagmap_t;
typedef u32 tagmap_t;
#endif
/*
......@@ -329,17 +328,6 @@ typedef u_int32 tagmap_t;
#define NCR_SNOOP_TIMEOUT (1000000)
/*
** Head of list of NCR boards
**
** For kernel version < 1.3.70, host is retrieved by its irq level.
** For later kernels, the internal host control block address
** (struct ncb) is used as device id parameter of the irq stuff.
*/
static struct Scsi_Host *first_host = NULL;
static Scsi_Host_Template *the_template = NULL;
/*
** Other definitions
*/
......@@ -663,8 +651,8 @@ struct lcb {
** 64 possible tags.
**----------------------------------------------------------------
*/
u_int32 jump_ccb_0; /* Default table if no tags */
u_int32 *jump_ccb; /* Virtual address */
u32 jump_ccb_0; /* Default table if no tags */
u32 *jump_ccb; /* Virtual address */
/*----------------------------------------------------------------
** CCB queue management.
......@@ -756,9 +744,9 @@ struct head {
** The goalpointer points after the last transfer command.
**----------------------------------------------------------------
*/
u_int32 savep;
u_int32 lastp;
u_int32 goalp;
u32 savep;
u32 lastp;
u32 goalp;
/*----------------------------------------------------------------
** Alternate data pointer.
......@@ -766,8 +754,8 @@ struct head {
** when the direction is unknown and the device claims data out.
**----------------------------------------------------------------
*/
u_int32 wlastp;
u_int32 wgoalp;
u32 wlastp;
u32 wgoalp;
/*----------------------------------------------------------------
** The virtual address of the ccb containing this header.
......@@ -965,7 +953,7 @@ struct ccb {
u_char auto_sense;
ccb_p link_ccb; /* Host adapter CCB chain */
XPT_QUEHEAD link_ccbq; /* Link to unit CCB queue */
u_int32 startp; /* Initial data pointer */
u32 startp; /* Initial data pointer */
u_long magic; /* Free / busy CCB flag */
};
......@@ -1064,7 +1052,7 @@ struct ncb {
** General controller parameters and configuration.
**----------------------------------------------------------------
*/
device_t dev;
struct device *dev;
u_short device_id; /* PCI device id */
u_char revision_id; /* PCI device revision id */
u_char bus; /* PCI BUS number */
......@@ -1116,7 +1104,7 @@ struct ncb {
*/
u_char msgout[8]; /* Buffer for MESSAGE OUT */
u_char msgin [8]; /* Buffer for MESSAGE IN */
u_int32 lastmsg; /* Last SCSI message sent */
u32 lastmsg; /* Last SCSI message sent */
u_char scratch; /* Scratch for SCSI receive */
/*----------------------------------------------------------------
......@@ -3591,7 +3579,7 @@ static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
*/
struct Scsi_Host * __init
ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device)
ncr_attach (Scsi_Host_Template *tpnt, int unit, struct ncr_device *device)
{
struct host_data *host_data;
ncb_p np = 0;
......@@ -3616,20 +3604,11 @@ ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device)
if(device->differential)
driver_setup.diff_support = device->differential;
printk(KERN_INFO "ncr53c%s-%d: rev 0x%x on pci bus %d device %d function %d "
#ifdef __sparc__
"irq %s\n",
#else
"irq %d\n",
#endif
printk(KERN_INFO "ncr53c%s-%d: rev 0x%x on bus %d device %d function %d irq %d\n",
device->chip.name, unit, device->chip.revision_id,
device->slot.bus, (device->slot.device_fn & 0xf8) >> 3,
device->slot.device_fn & 7,
#ifdef __sparc__
__irq_itoa(device->slot.irq));
#else
device->slot.irq);
#endif
/*
** Allocate host_data structure
......@@ -3842,7 +3821,7 @@ ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device)
ncr_chip_reset(np, 100);
/*
** Now check the cache handling of the pci chipset.
** Now check the cache handling of the chipset.
*/
if (ncr_snooptest (np)) {
......@@ -3909,14 +3888,6 @@ ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device)
np->order = M_SIMPLE_TAG;
#endif
/*
** Done.
*/
if (!the_template) {
the_template = instance->hostt;
first_host = instance;
}
NCR_UNLOCK_NCB(np, flags);
return instance;
......@@ -4263,7 +4234,7 @@ static int ncr_queue_command (ncb_p np, Scsi_Cmnd *cmd)
u_char idmsg, *msgptr;
u_int msglen;
int direction;
u_int32 lastp, goalp;
u32 lastp, goalp;
/*---------------------------------------------
**
......@@ -4702,7 +4673,7 @@ static void ncr_start_reset(ncb_p np)
static int ncr_reset_scsi_bus(ncb_p np, int enab_int, int settle_delay)
{
u_int32 term;
u32 term;
int retv = 0;
np->settle_time = ktime_get(settle_delay * HZ);
......@@ -6192,7 +6163,7 @@ static void ncr_timeout (ncb_p np)
static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
{
u_int32 dsp;
u32 dsp;
int script_ofs;
int script_size;
char *script_name;
......@@ -6533,11 +6504,11 @@ static int ncr_int_sbmc (ncb_p np)
static int ncr_int_par (ncb_p np)
{
u_char hsts = INB (HS_PRT);
u_int32 dbc = INL (nc_dbc);
u32 dbc = INL (nc_dbc);
u_char sstat1 = INB (nc_sstat1);
int phase = -1;
int msg = -1;
u_int32 jmp;
u32 jmp;
printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n",
ncr_name(np), hsts, dbc, sstat1);
......@@ -6619,15 +6590,15 @@ static int ncr_int_par (ncb_p np)
static void ncr_int_ma (ncb_p np)
{
u_int32 dbc;
u_int32 rest;
u_int32 dsp;
u_int32 dsa;
u_int32 nxtdsp;
u_int32 newtmp;
u_int32 *vdsp;
u_int32 oadr, olen;
u_int32 *tblp;
u32 dbc;
u32 rest;
u32 dsp;
u32 dsa;
u32 nxtdsp;
u32 newtmp;
u32 *vdsp;
u32 oadr, olen;
u32 *tblp;
ncrcmd *newcmd;
u_char cmd, sbcl;
ccb_p cp;
......@@ -6710,12 +6681,12 @@ static void ncr_int_ma (ncb_p np)
nxtdsp = 0;
if (dsp > np->p_script &&
dsp <= np->p_script + sizeof(struct script)) {
vdsp = (u_int32 *)((char*)np->script0 + (dsp-np->p_script-8));
vdsp = (u32 *)((char*)np->script0 + (dsp-np->p_script-8));
nxtdsp = dsp;
}
else if (dsp > np->p_scripth &&
dsp <= np->p_scripth + sizeof(struct scripth)) {
vdsp = (u_int32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8));
vdsp = (u32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8));
nxtdsp = dsp;
}
else if (cp) {
......@@ -6760,11 +6731,11 @@ static void ncr_int_ma (ncb_p np)
oadr = scr_to_cpu(vdsp[1]);
if (cmd & 0x10) { /* Table indirect */
tblp = (u_int32 *) ((char*) &cp->phys + oadr);
tblp = (u32 *) ((char*) &cp->phys + oadr);
olen = scr_to_cpu(tblp[0]);
oadr = scr_to_cpu(tblp[1]);
} else {
tblp = (u_int32 *) 0;
tblp = (u32 *) 0;
olen = scr_to_cpu(vdsp[0]) & 0xffffff;
};
......@@ -6927,7 +6898,7 @@ static void ncr_sir_to_redo(ncb_p np, int num, ccb_p cp)
ccb_p cp2;
int disc_cnt = 0;
int busy_cnt = 0;
u_int32 startp;
u32 startp;
u_char s_status = INB (SS_PRT);
/*
......@@ -8191,7 +8162,7 @@ static int ncr_scatter(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
/*==========================================================
**
**
** Test the pci bus snoop logic :-(
** Test the bus snoop logic :-(
**
** Has to be called with interrupts disabled.
**
......@@ -8202,7 +8173,7 @@ static int ncr_scatter(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
#ifndef SCSI_NCR_IOMAPPED
static int __init ncr_regtest (struct ncb* np)
{
register volatile u_int32 data;
register volatile u32 data;
/*
** ncr registers may NOT be cached.
** write 0xffffffff to a read only register area,
......@@ -8226,7 +8197,7 @@ static int __init ncr_regtest (struct ncb* np)
static int __init ncr_snooptest (struct ncb* np)
{
u_int32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
u32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
int i, err=0;
#ifndef SCSI_NCR_IOMAPPED
if (np->reg) {
......@@ -9086,18 +9057,9 @@ static int ncr_host_info(ncb_p np, char *ptr, off_t offset, int len)
copy_info(&info, " Chip NCR53C%s, device id 0x%x, "
"revision id 0x%x\n",
np->chip_name, np->device_id, np->revision_id);
copy_info(&info, " On PCI bus %d, device %d, function %d, "
#ifdef __sparc__
"IRQ %s\n",
#else
"IRQ %d\n",
#endif
copy_info(&info, " On PCI bus %d, device %d, function %d, IRQ %d\n",
np->bus, (np->device_fn & 0xf8) >> 3, np->device_fn & 7,
#ifdef __sparc__
__irq_itoa(np->irq));
#else
(int) np->irq);
#endif
copy_info(&info, " Synchronous period factor %d, "
"max commands per lun %d\n",
(int) np->minsync, MAX_TAGS);
......@@ -9179,47 +9141,6 @@ int __init ncr53c8xx_setup(char *str)
__setup("ncr53c8xx=", ncr53c8xx_setup);
#endif
/*===================================================================
**
** SYM53C8XX supported device list
**
**===================================================================
*/
static u_short ncr_chip_ids[] __initdata = {
PSEUDO_720_ID,
PCI_DEVICE_ID_NCR_53C810,
PCI_DEVICE_ID_NCR_53C815,
PCI_DEVICE_ID_NCR_53C820,
PCI_DEVICE_ID_NCR_53C825,
PCI_DEVICE_ID_NCR_53C860,
PCI_DEVICE_ID_NCR_53C875,
PCI_DEVICE_ID_NCR_53C875J,
PCI_DEVICE_ID_NCR_53C885,
PCI_DEVICE_ID_NCR_53C895,
PCI_DEVICE_ID_NCR_53C896,
PCI_DEVICE_ID_NCR_53C895A,
PCI_DEVICE_ID_NCR_53C1510D
};
/*==========================================================
**
** Chip detection entry point.
**
**==========================================================
*/
int __init ncr53c8xx_detect(Scsi_Host_Template *tpnt)
{
#if defined(SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT) && defined(MODULE)
if (ncr53c8xx)
ncr53c8xx_setup(ncr53c8xx);
#endif
return sym53c8xx__detect(tpnt, ncr_chip_ids,
sizeof(ncr_chip_ids)/sizeof(ncr_chip_ids[0]));
}
/*==========================================================
**
** Entry point for info() function
......
......@@ -42,12 +42,6 @@
#ifndef NCR53C8XX_H
#define NCR53C8XX_H
/*
** Define the BSD style u_int32 and u_int64 type.
** Are in fact u_int32_t and u_int64_t :-)
*/
typedef u32 u_int32;
typedef u64 u_int64;
typedef u_long vm_offset_t;
#include "sym53c8xx_defs.h"
......@@ -100,7 +94,7 @@ typedef struct {
**
**==========================================================
*/
typedef struct {
struct ncr_device {
struct device *dev;
ncr_slot slot;
ncr_chip chip;
......@@ -111,9 +105,9 @@ typedef struct {
#endif
__u8 differential;
int attach_done;
} ncr_device;
};
extern struct Scsi_Host *ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device);
extern struct Scsi_Host *ncr_attach (Scsi_Host_Template *tpnt, int unit, struct ncr_device *device);
extern int ncr53c8xx_release(struct Scsi_Host *host);
irqreturn_t ncr53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs);
......
/******************************************************************************
** High Performance device driver for the Symbios 53C896 controller.
**
** Copyright (C) 1998-2001 Gerard Roudier <groudier@free.fr>
**
** This driver also supports all the Symbios 53C8XX controller family,
** except 53C810 revisions < 16, 53C825 revisions < 16 and all
** revisions of 53C815 controllers.
**
** This driver is based on the Linux port of the FreeBSD ncr driver.
**
** Copyright (C) 1994 Wolfgang Stanglmeier
**
**-----------------------------------------------------------------------------
**
** This program is free software; you can redistribute it and/or modify
** it under the terms of the GNU General Public License as published by
** the Free Software Foundation; either version 2 of the License, or
** (at your option) any later version.
**
** This program is distributed in the hope that it will be useful,
** but WITHOUT ANY WARRANTY; without even the implied warranty of
** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
** GNU General Public License for more details.
**
** You should have received a copy of the GNU General Public License
** along with this program; if not, write to the Free Software
** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
**
**-----------------------------------------------------------------------------
**
** The Linux port of the FreeBSD ncr driver has been achieved in
** november 1995 by:
**
** Gerard Roudier <groudier@free.fr>
**
** Being given that this driver originates from the FreeBSD version, and
** in order to keep synergy on both, any suggested enhancements and corrections
** received on Linux are automatically a potential candidate for the FreeBSD
** version.
**
** The original driver has been written for 386bsd and FreeBSD by
** Wolfgang Stanglmeier <wolf@cologne.de>
** Stefan Esser <se@mi.Uni-Koeln.de>
**
**-----------------------------------------------------------------------------
**
** Major contributions:
** --------------------
**
** NVRAM detection and reading.
** Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
**
*******************************************************************************
*/
#ifndef SYM53C8XX_H
#define SYM53C8XX_H
#include "sym53c8xx_defs.h"
/*
** Define Scsi_Host_Template parameters
**
** Used by hosts.c and sym53c8xx.c with module configuration.
*/
#if (LINUX_VERSION_CODE >= 0x020400) || defined(HOSTS_C) || defined(MODULE)
#include <scsi/scsicam.h>
int sym53c8xx_abort(Scsi_Cmnd *);
int sym53c8xx_detect(Scsi_Host_Template *tpnt);
const char *sym53c8xx_info(struct Scsi_Host *host);
int sym53c8xx_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
int sym53c8xx_reset(Scsi_Cmnd *, unsigned int);
int sym53c8xx_slave_configure(Scsi_Device *);
int sym53c8xx_release(struct Scsi_Host *);
#endif /* defined(HOSTS_C) || defined(MODULE) */
#endif /* SYM53C8XX_H */
This diff is collapsed.
......@@ -951,7 +951,7 @@ struct Symbios_nvram {
/* Controller set up 20 bytes */
u_char v_major; /* 0x00 */
u_char v_minor; /* 0x30 */
u_int32 boot_crc;
u32 boot_crc;
u_short flags;
#define SYMBIOS_SCAM_ENABLE (1)
#define SYMBIOS_PARITY_ENABLE (1<<1)
......@@ -1187,7 +1187,7 @@ struct ncr_reg {
#define WRIE 0x01 /* mod: write and invalidate enable */
/* bits 4-7 rsvd for C1010 */
/*1c*/ u_int32 nc_temp; /* ### Temporary stack */
/*1c*/ u32 nc_temp; /* ### Temporary stack */
/*20*/ u_char nc_dfifo;
/*21*/ u_char nc_ctest4;
......@@ -1200,10 +1200,10 @@ struct ncr_reg {
/* bits 0-1, 3-7 rsvd for C1010 */
/*23*/ u_char nc_ctest6;
/*24*/ u_int32 nc_dbc; /* ### Byte count and command */
/*28*/ u_int32 nc_dnad; /* ### Next command register */
/*2c*/ u_int32 nc_dsp; /* --> Script Pointer */
/*30*/ u_int32 nc_dsps; /* --> Script pointer save/opcode#2 */
/*24*/ u32 nc_dbc; /* ### Byte count and command */
/*28*/ u32 nc_dnad; /* ### Next command register */
/*2c*/ u32 nc_dsp; /* --> Script Pointer */
/*30*/ u32 nc_dsps; /* --> Script pointer save/opcode#2 */
/*34*/ u_char nc_scratcha; /* Temporary register a */
/*35*/ u_char nc_scratcha1;
......@@ -1232,7 +1232,7 @@ struct ncr_reg {
#define NOCOM 0x01 /* cmd: protect sfbr while reselect */
/* bits 0-1 rsvd for C1010 */
/*3c*/ u_int32 nc_adder;
/*3c*/ u32 nc_adder;
/*40*/ u_short nc_sien; /* -->: interrupt enable */
/*42*/ u_short nc_sist; /* <--: interrupt status */
......@@ -1311,13 +1311,13 @@ struct ncr_reg {
/*5f*/ u_char nc_scr3; /* */
/*60*/ u_char nc_scrx[64]; /* Working register C-R */
/*a0*/ u_int32 nc_mmrs; /* Memory Move Read Selector */
/*a4*/ u_int32 nc_mmws; /* Memory Move Write Selector */
/*a8*/ u_int32 nc_sfs; /* Script Fetch Selector */
/*ac*/ u_int32 nc_drs; /* DSA Relative Selector */
/*b0*/ u_int32 nc_sbms; /* Static Block Move Selector */
/*b4*/ u_int32 nc_dbms; /* Dynamic Block Move Selector */
/*b8*/ u_int32 nc_dnad64; /* DMA Next Address 64 */
/*a0*/ u32 nc_mmrs; /* Memory Move Read Selector */
/*a4*/ u32 nc_mmws; /* Memory Move Write Selector */
/*a8*/ u32 nc_sfs; /* Script Fetch Selector */
/*ac*/ u32 nc_drs; /* DSA Relative Selector */
/*b0*/ u32 nc_sbms; /* Static Block Move Selector */
/*b4*/ u32 nc_dbms; /* Dynamic Block Move Selector */
/*b8*/ u32 nc_dnad64; /* DMA Next Address 64 */
/*bc*/ u_short nc_scntl4; /* C1010 only */
#define U3EN 0x80 /* Enable Ultra 3 */
#define AIPEN 0x40 /* Allow check upper byte lanes */
......@@ -1329,8 +1329,8 @@ struct ncr_reg {
/*be*/ u_char nc_aipcntl0; /* Epat Control 1 C1010 only */
/*bf*/ u_char nc_aipcntl1; /* AIP Control C1010_66 Only */
/*c0*/ u_int32 nc_pmjad1; /* Phase Mismatch Jump Address 1 */
/*c4*/ u_int32 nc_pmjad2; /* Phase Mismatch Jump Address 2 */
/*c0*/ u32 nc_pmjad1; /* Phase Mismatch Jump Address 1 */
/*c4*/ u32 nc_pmjad2; /* Phase Mismatch Jump Address 2 */
/*c8*/ u_char nc_rbc; /* Remaining Byte Count */
/*c9*/ u_char nc_rbc1; /* */
/*ca*/ u_char nc_rbc2; /* */
......@@ -1340,22 +1340,22 @@ struct ncr_reg {
/*cd*/ u_char nc_ua1; /* */
/*ce*/ u_char nc_ua2; /* */
/*cf*/ u_char nc_ua3; /* */
/*d0*/ u_int32 nc_esa; /* Entry Storage Address */
/*d0*/ u32 nc_esa; /* Entry Storage Address */
/*d4*/ u_char nc_ia; /* Instruction Address */
/*d5*/ u_char nc_ia1;
/*d6*/ u_char nc_ia2;
/*d7*/ u_char nc_ia3;
/*d8*/ u_int32 nc_sbc; /* SCSI Byte Count (3 bytes only) */
/*dc*/ u_int32 nc_csbc; /* Cumulative SCSI Byte Count */
/*d8*/ u32 nc_sbc; /* SCSI Byte Count (3 bytes only) */
/*dc*/ u32 nc_csbc; /* Cumulative SCSI Byte Count */
/* Following for C1010 only */
/*e0*/ u_short nc_crcpad; /* CRC Value */
/*e2*/ u_char nc_crccntl0; /* CRC control register */
#define SNDCRC 0x10 /* Send CRC Request */
/*e3*/ u_char nc_crccntl1; /* CRC control register */
/*e4*/ u_int32 nc_crcdata; /* CRC data register */
/*e8*/ u_int32 nc_e8_; /* rsvd */
/*ec*/ u_int32 nc_ec_; /* rsvd */
/*e4*/ u32 nc_crcdata; /* CRC data register */
/*e8*/ u32 nc_e8_; /* rsvd */
/*ec*/ u32 nc_ec_; /* rsvd */
/*f0*/ u_short nc_dfbc; /* DMA FIFO byte count */
};
......@@ -1370,7 +1370,7 @@ struct ncr_reg {
#define REGJ(p,r) (offsetof(struct ncr_reg, p ## r))
#define REG(r) REGJ (nc_, r)
typedef u_int32 ncrcmd;
typedef u32 ncrcmd;
/*-----------------------------------------------------------
**
......@@ -1422,8 +1422,8 @@ typedef u_int32 ncrcmd;
#define SCR_CHMOV_TBL (0x10000000)
struct scr_tblmove {
u_int32 size;
u_int32 addr;
u32 size;
u32 addr;
};
/*-----------------------------------------------------------
......@@ -1464,7 +1464,7 @@ struct scr_tblsel {
#endif
#define SCR_JMP_REL 0x04000000
#define SCR_ID(id) (((u_int32)(id)) << 16)
#define SCR_ID(id) (((u32)(id)) << 16)
/*-----------------------------------------------------------
**
......
......@@ -108,7 +108,7 @@ zalon_probe(struct parisc_device *dev)
unsigned long io_port = zalon + GSC_SCSI_ZALON_OFFSET;
static int unit = 0;
struct Scsi_Host *host;
ncr_device device;
struct ncr_device device;
__raw_writel(CMD_RESET, zalon + IO_MODULE_IO_COMMAND);
while (!(__raw_readl(zalon + IO_MODULE_IO_STATUS) & IOSTATUS_RY))
......@@ -133,7 +133,7 @@ zalon_probe(struct parisc_device *dev)
if (zalon_vers == 0)
printk(KERN_WARNING "%s: Zalon 1.1 or earlier\n", __FUNCTION__);
memset(&device, 0, sizeof(ncr_device));
memset(&device, 0, sizeof(struct ncr_device));
/* The following three are needed before any other access. */
writeb(0x20, io_port + 0x38); /* DCNTL_REG, EA */
......
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