Commit 18ffa046 authored by James Morse's avatar James Morse Committed by Will Deacon

arm64: kernel: Add min_field_value and use '>=' for feature detection

When a new cpu feature is available, the cpu feature bits will have some
initial value, which is incremented when the feature is updated.
This patch changes 'register_value' to be 'min_field_value', and checks
the feature bits value (interpreted as a signed int) is greater than this
minimum.
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarJames Morse <james.morse@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 1c076303
......@@ -42,8 +42,8 @@ struct arm64_cpu_capabilities {
};
struct { /* Feature register checking */
u64 register_mask;
u64 register_value;
int field_pos;
int min_field_value;
};
};
};
......
......@@ -22,13 +22,21 @@
#include <asm/cpu.h>
#include <asm/cpufeature.h>
static bool
feature_matches(u64 reg, const struct arm64_cpu_capabilities *entry)
{
int val = cpuid_feature_extract_field(reg, entry->field_pos);
return val >= entry->min_field_value;
}
static bool
has_id_aa64pfr0_feature(const struct arm64_cpu_capabilities *entry)
{
u64 val;
val = read_cpuid(id_aa64pfr0_el1);
return (val & entry->register_mask) == entry->register_value;
return feature_matches(val, entry);
}
static const struct arm64_cpu_capabilities arm64_features[] = {
......@@ -36,8 +44,8 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
.desc = "GIC system register CPU interface",
.capability = ARM64_HAS_SYSREG_GIC_CPUIF,
.matches = has_id_aa64pfr0_feature,
.register_mask = (0xf << 24),
.register_value = (1 << 24),
.field_pos = 24,
.min_field_value = 1,
},
{},
};
......
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