Commit 19417bd9 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman

ARM: dts: porter: Enable SCIF_CLK frequency and pins

Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent e50b5ac8
...@@ -143,11 +143,19 @@ &extal_clk { ...@@ -143,11 +143,19 @@ &extal_clk {
}; };
&pfc { &pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
scif0_pins: serial0 { scif0_pins: serial0 {
renesas,groups = "scif0_data_d"; renesas,groups = "scif0_data_d";
renesas,function = "scif0"; renesas,function = "scif0";
}; };
scif_clk_pins: scif_clk {
renesas,groups = "scif_clk";
renesas,function = "scif_clk";
};
ether_pins: ether { ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth"; renesas,function = "eth";
...@@ -221,6 +229,11 @@ &scif0 { ...@@ -221,6 +229,11 @@ &scif0 {
status = "okay"; status = "okay";
}; };
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};
&ether { &ether {
pinctrl-0 = <&ether_pins &phy1_pins>; pinctrl-0 = <&ether_pins &phy1_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
......
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