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Commit 19470306 authored by David S. Miller's avatar David S. Miller
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Merge branch 'dsa-prefix-Global-macros' 

Vivien Didelot says:

====================
net: dsa: prefix Global macros

This patch series is the 2/3 step of the register definitions cleanup.
It brings no functional changes.

It prefixes and documents all Global (1) registers with MV88E6XXX_G1_
(or a specific model like MV88E6352_G1_STS_PPU_STATE), and prefers a
16-bit hexadecimal representation of the Marvell registers layout.

The next and last patchset will prefix the Global 2 registers.
====================
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 83ad357d ccba8f3a
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Showing with 428 additions and 327 deletions
drivers/net/dsa/mv88e6xxx/chip.c
View file @ 19470306
This diff is collapsed.
drivers/net/dsa/mv88e6xxx/chip.h
View file @ 19470306
......@@ -127,12 +127,12 @@ enum mv88e6xxx_cap {
/* Per VLAN Spanning Tree Unit (STU).
* The Port State database, if present, is accessed through VTU
* operations and dedicated SID registers. See GLOBAL_VTU_SID.
* operations and dedicated SID registers. See MV88E6352_G1_VTU_SID.
*/
MV88E6XXX_CAP_STU,
/* VLAN Table Unit.
* The VTU is used to program 802.1Q VLANs. See GLOBAL_VTU_OP.
* The VTU is used to program 802.1Q VLANs. See MV88E6XXX_G1_VTU_OP.
*/
MV88E6XXX_CAP_VTU,
};
......
drivers/net/dsa/mv88e6xxx/global1.c
View file @ 19470306
This diff is collapsed.
drivers/net/dsa/mv88e6xxx/global1.h
View file @ 19470306
This diff is collapsed.
drivers/net/dsa/mv88e6xxx/global1_atu.c
View file @ 19470306
......@@ -17,7 +17,7 @@
static int mv88e6xxx_g1_atu_fid_write(struct mv88e6xxx_chip *chip, u16 fid)
{
return mv88e6xxx_g1_write(chip, GLOBAL_ATU_FID, fid & 0xfff);
return mv88e6xxx_g1_write(chip, MV88E6352_G1_ATU_FID, fid & 0xfff);
}
/* Offset 0x0A: ATU Control Register */
......@@ -27,16 +27,16 @@ int mv88e6xxx_g1_atu_set_learn2all(struct mv88e6xxx_chip *chip, bool learn2all)
u16 val;
int err;
err = mv88e6xxx_g1_read(chip, GLOBAL_ATU_CONTROL, &val);
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &val);
if (err)
return err;
if (learn2all)
val |= GLOBAL_ATU_CONTROL_LEARN2ALL;
val |= MV88E6XXX_G1_ATU_CTL_LEARN2ALL;
else
val &= ~GLOBAL_ATU_CONTROL_LEARN2ALL;
val &= ~MV88E6XXX_G1_ATU_CTL_LEARN2ALL;
return mv88e6xxx_g1_write(chip, GLOBAL_ATU_CONTROL, val);
return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val);
}
int mv88e6xxx_g1_atu_set_age_time(struct mv88e6xxx_chip *chip,
......@@ -55,7 +55,7 @@ int mv88e6xxx_g1_atu_set_age_time(struct mv88e6xxx_chip *chip,
/* Round to nearest multiple of coeff */
age_time = (msecs + coeff / 2) / coeff;
err = mv88e6xxx_g1_read(chip, GLOBAL_ATU_CONTROL, &val);
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &val);
if (err)
return err;
......@@ -63,7 +63,7 @@ int mv88e6xxx_g1_atu_set_age_time(struct mv88e6xxx_chip *chip,
val &= ~0xff0;
val |= age_time << 4;
err = mv88e6xxx_g1_write(chip, GLOBAL_ATU_CONTROL, val);
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val);
if (err)
return err;
......@@ -77,7 +77,8 @@ int mv88e6xxx_g1_atu_set_age_time(struct mv88e6xxx_chip *chip,
static int mv88e6xxx_g1_atu_op_wait(struct mv88e6xxx_chip *chip)
{
return mv88e6xxx_g1_wait(chip, GLOBAL_ATU_OP, GLOBAL_ATU_OP_BUSY);
return mv88e6xxx_g1_wait(chip, MV88E6XXX_G1_ATU_OP,
MV88E6XXX_G1_ATU_OP_BUSY);
}
static int mv88e6xxx_g1_atu_op(struct mv88e6xxx_chip *chip, u16 fid, u16 op)
......@@ -93,12 +94,14 @@ static int mv88e6xxx_g1_atu_op(struct mv88e6xxx_chip *chip, u16 fid, u16 op)
} else {
if (mv88e6xxx_num_databases(chip) > 16) {
/* ATU DBNum[7:4] are located in ATU Control 15:12 */
err = mv88e6xxx_g1_read(chip, GLOBAL_ATU_CONTROL, &val);
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL,
&val);
if (err)
return err;
val = (val & 0x0fff) | ((fid << 8) & 0xf000);
err = mv88e6xxx_g1_write(chip, GLOBAL_ATU_CONTROL, val);
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL,
val);
if (err)
return err;
}
......@@ -107,7 +110,8 @@ static int mv88e6xxx_g1_atu_op(struct mv88e6xxx_chip *chip, u16 fid, u16 op)
op |= fid & 0xf;
}
err = mv88e6xxx_g1_write(chip, GLOBAL_ATU_OP, op);
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_OP,
MV88E6XXX_G1_ATU_OP_BUSY | op);
if (err)
return err;
......@@ -122,13 +126,13 @@ static int mv88e6xxx_g1_atu_data_read(struct mv88e6xxx_chip *chip,
u16 val;
int err;
err = mv88e6xxx_g1_read(chip, GLOBAL_ATU_DATA, &val);
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_DATA, &val);
if (err)
return err;
entry->state = val & 0xf;
if (entry->state != GLOBAL_ATU_DATA_STATE_UNUSED) {
entry->trunk = !!(val & GLOBAL_ATU_DATA_TRUNK);
if (entry->state != MV88E6XXX_G1_ATU_DATA_STATE_UNUSED) {
entry->trunk = !!(val & MV88E6XXX_G1_ATU_DATA_TRUNK);
entry->portvec = (val >> 4) & mv88e6xxx_port_mask(chip);
}
......@@ -140,14 +144,14 @@ static int mv88e6xxx_g1_atu_data_write(struct mv88e6xxx_chip *chip,
{
u16 data = entry->state & 0xf;
if (entry->state != GLOBAL_ATU_DATA_STATE_UNUSED) {
if (entry->state != MV88E6XXX_G1_ATU_DATA_STATE_UNUSED) {
if (entry->trunk)
data |= GLOBAL_ATU_DATA_TRUNK;
data |= MV88E6XXX_G1_ATU_DATA_TRUNK;
data |= (entry->portvec & mv88e6xxx_port_mask(chip)) << 4;
}
return mv88e6xxx_g1_write(chip, GLOBAL_ATU_DATA, data);
return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_DATA, data);
}
/* Offset 0x0D: ATU MAC Address Register Bytes 0 & 1
......@@ -162,7 +166,7 @@ static int mv88e6xxx_g1_atu_mac_read(struct mv88e6xxx_chip *chip,
int i, err;
for (i = 0; i < 3; i++) {
err = mv88e6xxx_g1_read(chip, GLOBAL_ATU_MAC_01 + i, &val);
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_MAC01 + i, &val);
if (err)
return err;
......@@ -181,7 +185,7 @@ static int mv88e6xxx_g1_atu_mac_write(struct mv88e6xxx_chip *chip,
for (i = 0; i < 3; i++) {
val = (entry->mac[i * 2] << 8) | entry->mac[i * 2 + 1];
err = mv88e6xxx_g1_write(chip, GLOBAL_ATU_MAC_01 + i, val);
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_MAC01 + i, val);
if (err)
return err;
}
......@@ -201,13 +205,13 @@ int mv88e6xxx_g1_atu_getnext(struct mv88e6xxx_chip *chip, u16 fid,
return err;
/* Write the MAC address to iterate from only once */
if (entry->state == GLOBAL_ATU_DATA_STATE_UNUSED) {
if (entry->state == MV88E6XXX_G1_ATU_DATA_STATE_UNUSED) {
err = mv88e6xxx_g1_atu_mac_write(chip, entry);
if (err)
return err;
}
err = mv88e6xxx_g1_atu_op(chip, fid, GLOBAL_ATU_OP_GET_NEXT_DB);
err = mv88e6xxx_g1_atu_op(chip, fid, MV88E6XXX_G1_ATU_OP_GET_NEXT_DB);
if (err)
return err;
......@@ -235,7 +239,7 @@ int mv88e6xxx_g1_atu_loadpurge(struct mv88e6xxx_chip *chip, u16 fid,
if (err)
return err;
return mv88e6xxx_g1_atu_op(chip, fid, GLOBAL_ATU_OP_LOAD_DB);
return mv88e6xxx_g1_atu_op(chip, fid, MV88E6XXX_G1_ATU_OP_LOAD_DB);
}
static int mv88e6xxx_g1_atu_flushmove(struct mv88e6xxx_chip *chip, u16 fid,
......@@ -255,13 +259,13 @@ static int mv88e6xxx_g1_atu_flushmove(struct mv88e6xxx_chip *chip, u16 fid,
/* Flush/Move all or non-static entries from all or a given database */
if (all && fid)
op = GLOBAL_ATU_OP_FLUSH_MOVE_ALL_DB;
op = MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_ALL_DB;
else if (fid)
op = GLOBAL_ATU_OP_FLUSH_MOVE_NON_STATIC_DB;
op = MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_NON_STATIC_DB;
else if (all)
op = GLOBAL_ATU_OP_FLUSH_MOVE_ALL;
op = MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_ALL;
else
op = GLOBAL_ATU_OP_FLUSH_MOVE_NON_STATIC;
op = MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_NON_STATIC;
return mv88e6xxx_g1_atu_op(chip, fid, op);
}
......
drivers/net/dsa/mv88e6xxx/global1_vtu.c
View file @ 19470306
......@@ -22,11 +22,11 @@ static int mv88e6xxx_g1_vtu_fid_read(struct mv88e6xxx_chip *chip,
u16 val;
int err;
err = mv88e6xxx_g1_read(chip, GLOBAL_VTU_FID, &val);
err = mv88e6xxx_g1_read(chip, MV88E6352_G1_VTU_FID, &val);
if (err)
return err;
entry->fid = val & GLOBAL_VTU_FID_MASK;
entry->fid = val & MV88E6352_G1_VTU_FID_MASK;
return 0;
}
......@@ -34,9 +34,9 @@ static int mv88e6xxx_g1_vtu_fid_read(struct mv88e6xxx_chip *chip,
static int mv88e6xxx_g1_vtu_fid_write(struct mv88e6xxx_chip *chip,
struct mv88e6xxx_vtu_entry *entry)
{
u16 val = entry->fid & GLOBAL_VTU_FID_MASK;
u16 val = entry->fid & MV88E6352_G1_VTU_FID_MASK;
return mv88e6xxx_g1_write(chip, GLOBAL_VTU_FID, val);
return mv88e6xxx_g1_write(chip, MV88E6352_G1_VTU_FID, val);
}
/* Offset 0x03: VTU SID Register */
......@@ -47,11 +47,11 @@ static int mv88e6xxx_g1_vtu_sid_read(struct mv88e6xxx_chip *chip,
u16 val;
int err;
err = mv88e6xxx_g1_read(chip, GLOBAL_VTU_SID, &val);
err = mv88e6xxx_g1_read(chip, MV88E6352_G1_VTU_SID, &val);
if (err)
return err;
entry->sid = val & GLOBAL_VTU_SID_MASK;
entry->sid = val & MV88E6352_G1_VTU_SID_MASK;
return 0;
}
......@@ -59,23 +59,25 @@ static int mv88e6xxx_g1_vtu_sid_read(struct mv88e6xxx_chip *chip,
static int mv88e6xxx_g1_vtu_sid_write(struct mv88e6xxx_chip *chip,
struct mv88e6xxx_vtu_entry *entry)
{
u16 val = entry->sid & GLOBAL_VTU_SID_MASK;
u16 val = entry->sid & MV88E6352_G1_VTU_SID_MASK;
return mv88e6xxx_g1_write(chip, GLOBAL_VTU_SID, val);
return mv88e6xxx_g1_write(chip, MV88E6352_G1_VTU_SID, val);
}
/* Offset 0x05: VTU Operation Register */
static int mv88e6xxx_g1_vtu_op_wait(struct mv88e6xxx_chip *chip)
{
return mv88e6xxx_g1_wait(chip, GLOBAL_VTU_OP, GLOBAL_VTU_OP_BUSY);
return mv88e6xxx_g1_wait(chip, MV88E6XXX_G1_VTU_OP,
MV88E6XXX_G1_VTU_OP_BUSY);
}
static int mv88e6xxx_g1_vtu_op(struct mv88e6xxx_chip *chip, u16 op)
{
int err;
err = mv88e6xxx_g1_write(chip, GLOBAL_VTU_OP, op);
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_VTU_OP,
MV88E6XXX_G1_VTU_OP_BUSY | op);
if (err)
return err;
......@@ -90,16 +92,16 @@ static int mv88e6xxx_g1_vtu_vid_read(struct mv88e6xxx_chip *chip,
u16 val;
int err;
err = mv88e6xxx_g1_read(chip, GLOBAL_VTU_VID, &val);
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_VID, &val);
if (err)
return err;
entry->vid = val & 0xfff;
if (val & GLOBAL_VTU_VID_PAGE)
if (val & MV88E6390_G1_VTU_VID_PAGE)
entry->vid |= 0x1000;
entry->valid = !!(val & GLOBAL_VTU_VID_VALID);
entry->valid = !!(val & MV88E6XXX_G1_VTU_VID_VALID);
return 0;
}
......@@ -110,12 +112,12 @@ static int mv88e6xxx_g1_vtu_vid_write(struct mv88e6xxx_chip *chip,
u16 val = entry->vid & 0xfff;
if (entry->vid & 0x1000)
val |= GLOBAL_VTU_VID_PAGE;
val |= MV88E6390_G1_VTU_VID_PAGE;
if (entry->valid)
val |= GLOBAL_VTU_VID_VALID;
val |= MV88E6XXX_G1_VTU_VID_VALID;
return mv88e6xxx_g1_write(chip, GLOBAL_VTU_VID, val);
return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_VTU_VID, val);
}
/* Offset 0x07: VTU/STU Data Register 1
......@@ -134,7 +136,7 @@ static int mv88e6185_g1_vtu_data_read(struct mv88e6xxx_chip *chip,
u16 *reg = &regs[i];
int err;
err = mv88e6xxx_g1_read(chip, GLOBAL_VTU_DATA_0_3 + i, reg);
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_DATA1 + i, reg);
if (err)
return err;
}
......@@ -171,7 +173,7 @@ static int mv88e6185_g1_vtu_data_write(struct mv88e6xxx_chip *chip,
u16 reg = regs[i];
int err;
err = mv88e6xxx_g1_write(chip, GLOBAL_VTU_DATA_0_3 + i, reg);
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_VTU_DATA1 + i, reg);
if (err)
return err;
}
......@@ -189,7 +191,7 @@ static int mv88e6390_g1_vtu_data_read(struct mv88e6xxx_chip *chip, u8 *data)
u16 *reg = &regs[i];
int err;
err = mv88e6xxx_g1_read(chip, GLOBAL_VTU_DATA_0_3 + i, reg);
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_DATA1 + i, reg);
if (err)
return err;
}
......@@ -221,7 +223,7 @@ static int mv88e6390_g1_vtu_data_write(struct mv88e6xxx_chip *chip, u8 *data)
u16 reg = regs[i];
int err;
err = mv88e6xxx_g1_write(chip, GLOBAL_VTU_DATA_0_3 + i, reg);
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_VTU_DATA1 + i, reg);
if (err)
return err;
}
......@@ -240,7 +242,7 @@ static int mv88e6xxx_g1_vtu_stu_getnext(struct mv88e6xxx_chip *chip,
if (err)
return err;
err = mv88e6xxx_g1_vtu_op(chip, GLOBAL_VTU_OP_STU_GET_NEXT);
err = mv88e6xxx_g1_vtu_op(chip, MV88E6XXX_G1_VTU_OP_STU_GET_NEXT);
if (err)
return err;
......@@ -295,7 +297,7 @@ static int mv88e6xxx_g1_vtu_getnext(struct mv88e6xxx_chip *chip,
return err;
}
err = mv88e6xxx_g1_vtu_op(chip, GLOBAL_VTU_OP_VTU_GET_NEXT);
err = mv88e6xxx_g1_vtu_op(chip, MV88E6XXX_G1_VTU_OP_VTU_GET_NEXT);
if (err)
return err;
......@@ -320,7 +322,7 @@ int mv88e6185_g1_vtu_getnext(struct mv88e6xxx_chip *chip,
/* VTU DBNum[3:0] are located in VTU Operation 3:0
* VTU DBNum[7:4] are located in VTU Operation 11:8
*/
err = mv88e6xxx_g1_read(chip, GLOBAL_VTU_OP, &val);
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_OP, &val);
if (err)
return err;
......@@ -394,7 +396,7 @@ int mv88e6390_g1_vtu_getnext(struct mv88e6xxx_chip *chip,
int mv88e6185_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,
struct mv88e6xxx_vtu_entry *entry)
{
u16 op = GLOBAL_VTU_OP_VTU_LOAD_PURGE;
u16 op = MV88E6XXX_G1_VTU_OP_VTU_LOAD_PURGE;
int err;
err = mv88e6xxx_g1_vtu_op_wait(chip);
......@@ -444,7 +446,8 @@ int mv88e6352_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,
return err;
/* Load STU entry */
err = mv88e6xxx_g1_vtu_op(chip, GLOBAL_VTU_OP_STU_LOAD_PURGE);
err = mv88e6xxx_g1_vtu_op(chip,
MV88E6XXX_G1_VTU_OP_STU_LOAD_PURGE);
if (err)
return err;
......@@ -454,7 +457,7 @@ int mv88e6352_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,
}
/* Load/Purge VTU entry */
return mv88e6xxx_g1_vtu_op(chip, GLOBAL_VTU_OP_VTU_LOAD_PURGE);
return mv88e6xxx_g1_vtu_op(chip, MV88E6XXX_G1_VTU_OP_VTU_LOAD_PURGE);
}
int mv88e6390_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,
......@@ -481,7 +484,8 @@ int mv88e6390_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,
return err;
/* Load STU entry */
err = mv88e6xxx_g1_vtu_op(chip, GLOBAL_VTU_OP_STU_LOAD_PURGE);
err = mv88e6xxx_g1_vtu_op(chip,
MV88E6XXX_G1_VTU_OP_STU_LOAD_PURGE);
if (err)
return err;
......@@ -496,7 +500,7 @@ int mv88e6390_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,
}
/* Load/Purge VTU entry */
return mv88e6xxx_g1_vtu_op(chip, GLOBAL_VTU_OP_VTU_LOAD_PURGE);
return mv88e6xxx_g1_vtu_op(chip, MV88E6XXX_G1_VTU_OP_VTU_LOAD_PURGE);
}
int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip)
......@@ -507,5 +511,5 @@ int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip)
if (err)
return err;
return mv88e6xxx_g1_vtu_op(chip, GLOBAL_VTU_OP_FLUSH_ALL);
return mv88e6xxx_g1_vtu_op(chip, MV88E6XXX_G1_VTU_OP_FLUSH_ALL);
}
drivers/net/dsa/mv88e6xxx/global2.c
View file @ 19470306
......@@ -17,7 +17,7 @@
#include <linux/irqdomain.h>
#include "chip.h"
#include "global1.h" /* for GLOBAL_STATUS_IRQ_DEVICE */
#include "global1.h" /* for MV88E6XXX_G1_STS_IRQ_DEVICE */
#include "global2.h"
static int mv88e6xxx_g2_read(struct mv88e6xxx_chip *chip, int reg, u16 *val)
......@@ -977,7 +977,7 @@ int mv88e6xxx_g2_irq_setup(struct mv88e6xxx_chip *chip)
chip->g2_irq.masked = ~0;
chip->device_irq = irq_find_mapping(chip->g1_irq.domain,
GLOBAL_STATUS_IRQ_DEVICE);
MV88E6XXX_G1_STS_IRQ_DEVICE);
if (chip->device_irq < 0) {
err = chip->device_irq;
goto out;
......
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