Commit 199f45c4 authored by Milton Miller's avatar Milton Miller Committed by Benjamin Herrenschmidt

powerpc/xics: Reduce and comment xics IPI use of memory barriers

A single full sync (mb()) is requrired to order the mmio to the qirr reg
with the set or clear of the message word.  However, test_and_clear_bit
has the effect of smp_mb() and we are not doing any other io from here,
so we don't need a mb per bit processed.
Signed-off-by: default avatarMilton Miller <miltonm@bga.com>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 2172fe87
...@@ -498,26 +498,23 @@ static irqreturn_t xics_ipi_dispatch(int cpu) ...@@ -498,26 +498,23 @@ static irqreturn_t xics_ipi_dispatch(int cpu)
{ {
WARN_ON(cpu_is_offline(cpu)); WARN_ON(cpu_is_offline(cpu));
mb(); /* order mmio clearing qirr */
while (xics_ipi_message[cpu].value) { while (xics_ipi_message[cpu].value) {
if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION, if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION,
&xics_ipi_message[cpu].value)) { &xics_ipi_message[cpu].value)) {
mb();
smp_message_recv(PPC_MSG_CALL_FUNCTION); smp_message_recv(PPC_MSG_CALL_FUNCTION);
} }
if (test_and_clear_bit(PPC_MSG_RESCHEDULE, if (test_and_clear_bit(PPC_MSG_RESCHEDULE,
&xics_ipi_message[cpu].value)) { &xics_ipi_message[cpu].value)) {
mb();
smp_message_recv(PPC_MSG_RESCHEDULE); smp_message_recv(PPC_MSG_RESCHEDULE);
} }
if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE, if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE,
&xics_ipi_message[cpu].value)) { &xics_ipi_message[cpu].value)) {
mb();
smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE); smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
} }
#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK, if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK,
&xics_ipi_message[cpu].value)) { &xics_ipi_message[cpu].value)) {
mb();
smp_message_recv(PPC_MSG_DEBUGGER_BREAK); smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
} }
#endif #endif
......
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