Commit 1b545c17 authored by Bhuvanchandra DV's avatar Bhuvanchandra DV Committed by Shawn Guo

ARM: vf610: add second DSPI instance

Signed-off-by: default avatarBhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: default avatarStefan Agner <stefan@agner.ch>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent c5455f70
...@@ -66,6 +66,10 @@ &dspi0 { ...@@ -66,6 +66,10 @@ &dspi0 {
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
}; };
&dspi1 {
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
};
&edma0 { &edma0 {
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
......
...@@ -139,6 +139,17 @@ dspi0: dspi0@4002c000 { ...@@ -139,6 +139,17 @@ dspi0: dspi0@4002c000 {
status = "disabled"; status = "disabled";
}; };
dspi1: dspi1@4002d000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,vf610-dspi";
reg = <0x4002d000 0x1000>;
clocks = <&clks VF610_CLK_DSPI1>;
clock-names = "dspi";
spi-num-chipselects = <5>;
status = "disabled";
};
sai2: sai@40031000 { sai2: sai@40031000 {
compatible = "fsl,vf610-sai"; compatible = "fsl,vf610-sai";
reg = <0x40031000 0x1000>; reg = <0x40031000 0x1000>;
......
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