Commit 1ce81f4f authored by Richard Kuo's avatar Richard Kuo

Hexagon: add IOMEM and _relaxed IO macros

Signed-off-by: default avatarRichard Kuo <rkuo@codeaurora.org>
parent f167063a
...@@ -40,6 +40,8 @@ ...@@ -40,6 +40,8 @@
#define IO_SPACE_LIMIT 0xffff #define IO_SPACE_LIMIT 0xffff
#define _IO_BASE ((void __iomem *)0xfe000000) #define _IO_BASE ((void __iomem *)0xfe000000)
#define IOMEM(x) ((void __force __iomem *)(x))
extern int remap_area_pages(unsigned long start, unsigned long phys_addr, extern int remap_area_pages(unsigned long start, unsigned long phys_addr,
unsigned long end, unsigned long flags); unsigned long end, unsigned long flags);
...@@ -175,6 +177,18 @@ static inline void writel(u32 data, volatile void __iomem *addr) ...@@ -175,6 +177,18 @@ static inline void writel(u32 data, volatile void __iomem *addr)
#define __raw_readw readw #define __raw_readw readw
#define __raw_readl readl #define __raw_readl readl
/*
* http://comments.gmane.org/gmane.linux.ports.arm.kernel/117626
*/
#define readb_relaxed __raw_readb
#define readw_relaxed __raw_readw
#define readl_relaxed __raw_readl
#define writeb_relaxed __raw_writeb
#define writew_relaxed __raw_writew
#define writel_relaxed __raw_writel
/* /*
* Need an mtype somewhere in here, for cache type deals? * Need an mtype somewhere in here, for cache type deals?
* This is probably too long for an inline. * This is probably too long for an inline.
......
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