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Commit 1d04a64a authored by Ben Skeggs's avatar Ben Skeggs
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drm/nouveau/fbcon: convert imageblit() to new push macros 

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent d9a91300
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Showing with 63 additions and 92 deletions
drivers/gpu/drm/nouveau/nouveau_dma.c
View file @ 1d04a64a
......@@ -30,19 +30,6 @@
#include <nvif/user.h>
void
OUT_RINGp(struct nouveau_channel *chan, const void *data, unsigned nr_dwords)
{
bool is_iomem;
u32 *mem = ttm_kmap_obj_virtual(&chan->push.buffer->kmap, &is_iomem);
mem = &mem[chan->dma.cur];
if (is_iomem)
memcpy_toio((void __force __iomem *)mem, data, nr_dwords * 4);
else
memcpy(mem, data, nr_dwords * 4);
chan->dma.cur += nr_dwords;
}
/* Fetch and adjust GPU GET pointer
*
* Returns:
......
drivers/gpu/drm/nouveau/nouveau_dma.h
View file @ 1d04a64a
......@@ -101,33 +101,18 @@ OUT_RING(struct nouveau_channel *chan, int data)
nouveau_bo_wr32(chan->push.buffer, chan->dma.cur++, data);
}
extern void
OUT_RINGp(struct nouveau_channel *chan, const void *data, unsigned nr_dwords);
static inline void
BEGIN_NV04(struct nouveau_channel *chan, int subc, int mthd, int size)
{
OUT_RING(chan, 0x00000000 | (subc << 13) | (size << 18) | mthd);
}
static inline void
BEGIN_NI04(struct nouveau_channel *chan, int subc, int mthd, int size)
{
OUT_RING(chan, 0x40000000 | (subc << 13) | (size << 18) | mthd);
}
static inline void
BEGIN_NVC0(struct nouveau_channel *chan, int subc, int mthd, int size)
{
OUT_RING(chan, 0x20000000 | (size << 16) | (subc << 13) | (mthd >> 2));
}
static inline void
BEGIN_NIC0(struct nouveau_channel *chan, int subc, int mthd, int size)
{
OUT_RING(chan, 0x60000000 | (size << 16) | (subc << 13) | (mthd >> 2));
}
static inline void
BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, u16 data)
{
......
drivers/gpu/drm/nouveau/nv04_fbcon.c
View file @ 1d04a64a
......@@ -81,6 +81,7 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
struct nouveau_fbdev *nfbdev = info->par;
struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
struct nouveau_channel *chan = drm->channel;
struct nvif_push *push = chan->chan.push;
uint32_t fg;
uint32_t bg;
uint32_t dsize;
......@@ -90,7 +91,7 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
if (image->depth != 1)
return -ENODEV;
ret = RING_SPACE(chan, 8);
ret = PUSH_WAIT(push, 8);
if (ret)
return ret;
......@@ -103,31 +104,29 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
bg = image->bg_color;
}
BEGIN_NV04(chan, NvSubGdiRect, 0x0be4, 7);
OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff));
OUT_RING(chan, ((image->dy + image->height) << 16) |
((image->dx + image->width) & 0xffff));
OUT_RING(chan, bg);
OUT_RING(chan, fg);
OUT_RING(chan, (image->height << 16) | ALIGN(image->width, 8));
OUT_RING(chan, (image->height << 16) | image->width);
OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff));
PUSH_NVSQ(push, NV04A, 0x0be4, (image->dy << 16) | (image->dx & 0xffff),
0x0be8, ((image->dy + image->height) << 16) |
((image->dx + image->width) & 0xffff),
0x0bec, bg,
0x0bf0, fg,
0x0bf4, (image->height << 16) | ALIGN(image->width, 8),
0x0bf8, (image->height << 16) | image->width,
0x0bfc, (image->dy << 16) | (image->dx & 0xffff));
dsize = ALIGN(ALIGN(image->width, 8) * image->height, 32) >> 5;
while (dsize) {
int iter_len = dsize > 128 ? 128 : dsize;
ret = RING_SPACE(chan, iter_len + 1);
ret = PUSH_WAIT(push, iter_len + 1);
if (ret)
return ret;
BEGIN_NV04(chan, NvSubGdiRect, 0x0c00, iter_len);
OUT_RINGp(chan, data, iter_len);
PUSH_NVSQ(push, NV04A, 0x0c00, data, iter_len);
data += iter_len;
dsize -= iter_len;
}
FIRE_RING(chan);
PUSH_KICK(push);
return 0;
}
......
drivers/gpu/drm/nouveau/nv50_fbcon.c
View file @ 1d04a64a
......@@ -98,52 +98,52 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
struct nouveau_fbdev *nfbdev = info->par;
struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
struct nouveau_channel *chan = drm->channel;
struct nvif_push *push = chan->chan.push;
uint32_t dwords, *data = (uint32_t *)image->data;
uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
uint32_t *palette = info->pseudo_palette;
uint32_t *palette = info->pseudo_palette, bg, fg;
int ret;
if (image->depth != 1)
return -ENODEV;
ret = RING_SPACE(chan, 11);
if (ret)
return ret;
BEGIN_NV04(chan, NvSub2D, 0x0814, 2);
if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
OUT_RING(chan, palette[image->bg_color] | mask);
OUT_RING(chan, palette[image->fg_color] | mask);
bg = palette[image->bg_color] | mask;
fg = palette[image->fg_color] | mask;
} else {
OUT_RING(chan, image->bg_color);
OUT_RING(chan, image->fg_color);
bg = image->bg_color;
fg = image->fg_color;
}
BEGIN_NV04(chan, NvSub2D, 0x0838, 2);
OUT_RING(chan, image->width);
OUT_RING(chan, image->height);
BEGIN_NV04(chan, NvSub2D, 0x0850, 4);
OUT_RING(chan, 0);
OUT_RING(chan, image->dx);
OUT_RING(chan, 0);
OUT_RING(chan, image->dy);
ret = PUSH_WAIT(push, 11);
if (ret)
return ret;
PUSH_NVSQ(push, NV502D, 0x0814, bg,
0x0818, fg);
PUSH_NVSQ(push, NV502D, 0x0838, image->width,
0x083c, image->height);
PUSH_NVSQ(push, NV502D, 0x0850, 0,
0x0854, image->dx,
0x0858, 0,
0x085c, image->dy);
dwords = ALIGN(ALIGN(image->width, 8) * image->height, 32) >> 5;
while (dwords) {
int push = dwords > 2047 ? 2047 : dwords;
int count = dwords > 2047 ? 2047 : dwords;
ret = RING_SPACE(chan, push + 1);
ret = PUSH_WAIT(push, count + 1);
if (ret)
return ret;
dwords -= push;
dwords -= count;
BEGIN_NI04(chan, NvSub2D, 0x0860, push);
OUT_RINGp(chan, data, push);
data += push;
PUSH_NVNI(push, NV502D, 0x0860, data, count);
data += count;
}
FIRE_RING(chan);
PUSH_KICK(push);
return 0;
}
......
drivers/gpu/drm/nouveau/nvc0_fbcon.c
View file @ 1d04a64a
......@@ -98,52 +98,52 @@ nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
struct nouveau_fbdev *nfbdev = info->par;
struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
struct nouveau_channel *chan = drm->channel;
struct nvif_push *push = chan->chan.push;
uint32_t dwords, *data = (uint32_t *)image->data;
uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
uint32_t *palette = info->pseudo_palette;
uint32_t *palette = info->pseudo_palette, bg, fg;
int ret;
if (image->depth != 1)
return -ENODEV;
ret = RING_SPACE(chan, 11);
if (ret)
return ret;
BEGIN_NVC0(chan, NvSub2D, 0x0814, 2);
if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
OUT_RING (chan, palette[image->bg_color] | mask);
OUT_RING (chan, palette[image->fg_color] | mask);
bg = palette[image->bg_color] | mask;
fg = palette[image->fg_color] | mask;
} else {
OUT_RING (chan, image->bg_color);
OUT_RING (chan, image->fg_color);
bg = image->bg_color;
fg = image->fg_color;
}
BEGIN_NVC0(chan, NvSub2D, 0x0838, 2);
OUT_RING (chan, image->width);
OUT_RING (chan, image->height);
BEGIN_NVC0(chan, NvSub2D, 0x0850, 4);
OUT_RING (chan, 0);
OUT_RING (chan, image->dx);
OUT_RING (chan, 0);
OUT_RING (chan, image->dy);
ret = PUSH_WAIT(push, 11);
if (ret)
return ret;
PUSH_NVSQ(push, NV902D, 0x0814, bg,
0x0818, fg);
PUSH_NVSQ(push, NV902D, 0x0838, image->width,
0x083c, image->height);
PUSH_NVSQ(push, NV902D, 0x0850, 0,
0x0854, image->dx,
0x0858, 0,
0x085c, image->dy);
dwords = ALIGN(ALIGN(image->width, 8) * image->height, 32) >> 5;
while (dwords) {
int push = dwords > 2047 ? 2047 : dwords;
int count = dwords > 2047 ? 2047 : dwords;
ret = RING_SPACE(chan, push + 1);
ret = PUSH_WAIT(push, count + 1);
if (ret)
return ret;
dwords -= push;
dwords -= count;
BEGIN_NIC0(chan, NvSub2D, 0x0860, push);
OUT_RINGp(chan, data, push);
data += push;
PUSH_NVNI(push, NV902D, 0x0860, data, count);
data += count;
}
FIRE_RING(chan);
PUSH_KICK(push);
return 0;
}
......
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