[SPARC64]: Disable SBH interrupt properly.

Signed-off-by: David S. Miller <davem@davemloft.net>

arch/sparc64/kernel/pci_psycho.c

@@ -887,7 +887,7 @@ static irqreturn_t psycho_pcierr_intr_other(struct pci_pbm_info *pbm, int is_pbm
 	}
 	csr = psycho_read(csr_reg);
 	csr_error_bits =
-		csr & (/*PSYCHO_PCICTRL_SBH_ERR |*/ PSYCHO_PCICTRL_SERR);
+		csr & (PSYCHO_PCICTRL_SBH_ERR | PSYCHO_PCICTRL_SERR);
 	if (csr_error_bits) {
 		/* Clear the errors.  */
 		psycho_write(csr_reg, csr);
@@ -1077,16 +1077,16 @@ static void __init psycho_register_error_handlers(struct pci_controller_info *p)
 	 */
 	tmp = psycho_read(base + PSYCHO_PCIA_CTRL);
 	tmp |= (PSYCHO_PCICTRL_SERR |
-		PSYCHO_PCICTRL_SBH_INT |
+		PSYCHO_PCICTRL_SBH_ERR |
 		PSYCHO_PCICTRL_EEN);
-	tmp &= ~(PSYCHO_PCICTRL_SBH_ERR);
+	tmp &= ~(PSYCHO_PCICTRL_SBH_INT);
 	psycho_write(base + PSYCHO_PCIA_CTRL, tmp);
 		     
 	tmp = psycho_read(base + PSYCHO_PCIB_CTRL);
 	tmp |= (PSYCHO_PCICTRL_SERR |
-		PSYCHO_PCICTRL_SBH_INT |
+		PSYCHO_PCICTRL_SBH_ERR |
 		PSYCHO_PCICTRL_EEN);
-	tmp &= ~(PSYCHO_PCICTRL_SBH_ERR);
+	tmp &= ~(PSYCHO_PCICTRL_SBH_INT);
 	psycho_write(base + PSYCHO_PCIB_CTRL, tmp);
 }
 

arch/sparc64/kernel/pci_schizo.c

@@ -886,7 +886,7 @@ static irqreturn_t schizo_pcierr_intr_other(struct pci_pbm_info *pbm)
 		       SCHIZO_PCICTRL_TTO_ERR |
 		       SCHIZO_PCICTRL_RTRY_ERR |
 		       SCHIZO_PCICTRL_DTO_ERR |
-		       /*SCHIZO_PCICTRL_SBH_ERR |*/
+		       SCHIZO_PCICTRL_SBH_ERR |
 		       SCHIZO_PCICTRL_SERR);
 	if (csr_error_bits) {
 		/* Clear the errors.  */
@@ -1370,12 +1370,12 @@ static void __init schizo_register_error_handlers(struct pci_controller_info *p)
 		    SCHIZO_PCICTRL_ESLCK |
 		    SCHIZO_PCICTRL_TTO_ERR |
 		    SCHIZO_PCICTRL_RTRY_ERR |
-		    /*SCHIZO_PCICTRL_SBH_ERR |*/
+		    SCHIZO_PCICTRL_SBH_ERR |
 		    SCHIZO_PCICTRL_SERR |
-		    SCHIZO_PCICTRL_SBH_INT |
 		    SCHIZO_PCICTRL_EEN);
 
-	err_no_mask = SCHIZO_PCICTRL_DTO_ERR;
+	err_no_mask = (SCHIZO_PCICTRL_DTO_ERR |
+		       SCHIZO_PCICTRL_SBH_INT);
 
 	/* Enable PCI Error interrupts and clear error
 	 * bits for each PBM.