Commit 1ddf499e authored by Michael Neuling's avatar Michael Neuling Committed by Benjamin Herrenschmidt

powerpc: Turn on the EBB H/FSCR bits

This turns Event Based Branching (EBB) on in the Hypervisor Facility Status and
Control Register (HFSCR) and Facility Status and Control Register (FSCR).
Signed-off-by: default avatarMichael Neuling <mikey@neuling.org>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 1de2bd4e
...@@ -267,9 +267,11 @@ ...@@ -267,9 +267,11 @@
#define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */ #define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */
#define SPRN_FSCR 0x099 /* Facility Status & Control Register */ #define SPRN_FSCR 0x099 /* Facility Status & Control Register */
#define FSCR_TAR (1 << (63-55)) /* Enable Target Address Register */ #define FSCR_TAR (1 << (63-55)) /* Enable Target Address Register */
#define FSCR_EBB (1 << (63-56)) /* Enable Event Based Branching */
#define FSCR_DSCR (1 << (63-61)) /* Enable Data Stream Control Register */ #define FSCR_DSCR (1 << (63-61)) /* Enable Data Stream Control Register */
#define SPRN_HFSCR 0xbe /* HV=1 Facility Status & Control Register */ #define SPRN_HFSCR 0xbe /* HV=1 Facility Status & Control Register */
#define HFSCR_TAR (1 << (63-55)) /* Enable Target Address Register */ #define HFSCR_TAR (1 << (63-55)) /* Enable Target Address Register */
#define HFSCR_EBB (1 << (63-56)) /* Enable Event Based Branching */
#define HFSCR_TM (1 << (63-58)) /* Enable Transactional Memory */ #define HFSCR_TM (1 << (63-58)) /* Enable Transactional Memory */
#define HFSCR_PM (1 << (63-60)) /* Enable prob/priv access to PMU SPRs */ #define HFSCR_PM (1 << (63-60)) /* Enable prob/priv access to PMU SPRs */
#define HFSCR_BHRB (1 << (63-59)) /* Enable Branch History Rolling Buffer*/ #define HFSCR_BHRB (1 << (63-59)) /* Enable Branch History Rolling Buffer*/
......
...@@ -123,14 +123,14 @@ __init_LPCR: ...@@ -123,14 +123,14 @@ __init_LPCR:
__init_FSCR: __init_FSCR:
mfspr r3,SPRN_FSCR mfspr r3,SPRN_FSCR
ori r3,r3,FSCR_TAR|FSCR_DSCR ori r3,r3,FSCR_TAR|FSCR_DSCR|FSCR_EBB
mtspr SPRN_FSCR,r3 mtspr SPRN_FSCR,r3
blr blr
__init_HFSCR: __init_HFSCR:
mfspr r3,SPRN_HFSCR mfspr r3,SPRN_HFSCR
ori r3,r3,HFSCR_TAR|HFSCR_TM|HFSCR_BHRB|HFSCR_PM|\ ori r3,r3,HFSCR_TAR|HFSCR_TM|HFSCR_BHRB|HFSCR_PM|\
HFSCR_DSCR|HFSCR_VECVSX|HFSCR_FP HFSCR_DSCR|HFSCR_VECVSX|HFSCR_FP|HFSCR_EBB
mtspr SPRN_HFSCR,r3 mtspr SPRN_HFSCR,r3
blr blr
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment