Commit 1fe23843 authored by Amelie Delaunay's avatar Amelie Delaunay Committed by Alexandre Torgue

ARM: dts: stm32: add SPI support on STM32H743 SoC

This patch adds all SPI instances of the STM32H743 SoC.
Signed-off-by: default avatarAmelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@st.com>
parent be36ced8
......@@ -101,6 +101,27 @@ counter {
};
};
spi2: spi@40003800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32h7-spi";
reg = <0x40003800 0x400>;
interrupts = <36>;
clocks = <&rcc SPI2_CK>;
status = "disabled";
};
spi3: spi@40003c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32h7-spi";
reg = <0x40003c00 0x400>;
interrupts = <51>;
clocks = <&rcc SPI3_CK>;
status = "disabled";
};
usart2: serial@40004400 {
compatible = "st,stm32f7-uart";
reg = <0x40004400 0x400>;
......@@ -141,6 +162,36 @@ usart1: serial@40011000 {
clocks = <&rcc USART1_CK>;
};
spi1: spi@40013000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32h7-spi";
reg = <0x40013000 0x400>;
interrupts = <35>;
clocks = <&rcc SPI1_CK>;
status = "disabled";
};
spi4: spi@40013400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32h7-spi";
reg = <0x40013400 0x400>;
interrupts = <84>;
clocks = <&rcc SPI4_CK>;
status = "disabled";
};
spi5: spi@40015000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32h7-spi";
reg = <0x40015000 0x400>;
interrupts = <85>;
clocks = <&rcc SPI5_CK>;
status = "disabled";
};
dma1: dma@40020000 {
compatible = "st,stm32-dma";
reg = <0x40020000 0x400>;
......@@ -262,6 +313,16 @@ syscfg: system-config@58000400 {
reg = <0x58000400 0x400>;
};
spi6: spi@58001400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32h7-spi";
reg = <0x58001400 0x400>;
interrupts = <86>;
clocks = <&rcc SPI6_CK>;
status = "disabled";
};
lptimer2: timer@58002400 {
#address-cells = <1>;
#size-cells = <0>;
......
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