Commit 20676a4c authored by Sylwester Nawrocki's avatar Sylwester Nawrocki Committed by Mauro Carvalho Chehab

[media] s5p-fimc: Don't use platform data for CSI data alignment configuration

The MIPI-CSI2 data alignment parameter can be derived from media bus
pixel code, so it can be now dropped from the platform data structure.
This is a prerequisite for adding the device tree support. Once this
patch is merged the corresponding fields will be removed from the
drivers' public headers and corresponding board files.
Signed-off-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 5b9d770f
...@@ -674,6 +674,7 @@ int fimc_hw_set_camera_type(struct fimc_dev *fimc, ...@@ -674,6 +674,7 @@ int fimc_hw_set_camera_type(struct fimc_dev *fimc,
{ {
u32 cfg, tmp; u32 cfg, tmp;
struct fimc_vid_cap *vid_cap = &fimc->vid_cap; struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
u32 csis_data_alignment = 32;
cfg = readl(fimc->regs + S5P_CIGCTRL); cfg = readl(fimc->regs + S5P_CIGCTRL);
...@@ -703,7 +704,7 @@ int fimc_hw_set_camera_type(struct fimc_dev *fimc, ...@@ -703,7 +704,7 @@ int fimc_hw_set_camera_type(struct fimc_dev *fimc,
vid_cap->mf.code); vid_cap->mf.code);
return -EINVAL; return -EINVAL;
} }
tmp |= (cam->csi_data_align == 32) << 8; tmp |= (csis_data_alignment == 32) << 8;
writel(tmp, fimc->regs + S5P_CSIIMGFMT); writel(tmp, fimc->regs + S5P_CSIIMGFMT);
......
...@@ -127,20 +127,24 @@ struct csis_state { ...@@ -127,20 +127,24 @@ struct csis_state {
* multiple of 2^pix_width_alignment * multiple of 2^pix_width_alignment
* @code: corresponding media bus code * @code: corresponding media bus code
* @fmt_reg: S5PCSIS_CONFIG register value * @fmt_reg: S5PCSIS_CONFIG register value
* @data_alignment: MIPI-CSI data alignment in bits
*/ */
struct csis_pix_format { struct csis_pix_format {
unsigned int pix_width_alignment; unsigned int pix_width_alignment;
enum v4l2_mbus_pixelcode code; enum v4l2_mbus_pixelcode code;
u32 fmt_reg; u32 fmt_reg;
u8 data_alignment;
}; };
static const struct csis_pix_format s5pcsis_formats[] = { static const struct csis_pix_format s5pcsis_formats[] = {
{ {
.code = V4L2_MBUS_FMT_VYUY8_2X8, .code = V4L2_MBUS_FMT_VYUY8_2X8,
.fmt_reg = S5PCSIS_CFG_FMT_YCBCR422_8BIT, .fmt_reg = S5PCSIS_CFG_FMT_YCBCR422_8BIT,
.data_alignment = 32,
}, { }, {
.code = V4L2_MBUS_FMT_JPEG_1X8, .code = V4L2_MBUS_FMT_JPEG_1X8,
.fmt_reg = S5PCSIS_CFG_FMT_USER(1), .fmt_reg = S5PCSIS_CFG_FMT_USER(1),
.data_alignment = 32,
}, },
}; };
...@@ -239,7 +243,7 @@ static void s5pcsis_set_params(struct csis_state *state) ...@@ -239,7 +243,7 @@ static void s5pcsis_set_params(struct csis_state *state)
s5pcsis_set_hsync_settle(state, pdata->hs_settle); s5pcsis_set_hsync_settle(state, pdata->hs_settle);
val = s5pcsis_read(state, S5PCSIS_CTRL); val = s5pcsis_read(state, S5PCSIS_CTRL);
if (pdata->alignment == 32) if (state->csis_fmt->data_alignment == 32)
val |= S5PCSIS_CTRL_ALIGN_32BIT; val |= S5PCSIS_CTRL_ALIGN_32BIT;
else /* 24-bits */ else /* 24-bits */
val &= ~S5PCSIS_CTRL_ALIGN_32BIT; val &= ~S5PCSIS_CTRL_ALIGN_32BIT;
......
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