Commit 245b6c65 authored by Thor Thayer's avatar Thor Thayer Committed by Borislav Petkov

EDAC, altera: Fix S10 persistent register offset

Correct the persistent register offset where address and status are
stored.

Fixes: 08f08bfb ("EDAC, altera: Merge Stratix10 into the Arria10 SDRAM probe routine")
Signed-off-by: default avatarThor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Cc: James Morse <james.morse@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@kernel.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: mark.rutland@arm.com
Cc: robh+dt@kernel.org
Cc: stable <stable@vger.kernel.org>
Link: https://lkml.kernel.org/r/1548179287-21760-2-git-send-email-thor.thayer@linux.intel.com
parent 49a57857
...@@ -295,8 +295,8 @@ struct altr_sdram_mc_data { ...@@ -295,8 +295,8 @@ struct altr_sdram_mc_data {
#define S10_SYSMGR_ECC_INTSTAT_DERR_OFST 0xA0 #define S10_SYSMGR_ECC_INTSTAT_DERR_OFST 0xA0
/* Sticky registers for Uncorrected Errors */ /* Sticky registers for Uncorrected Errors */
#define S10_SYSMGR_UE_VAL_OFST 0x120 #define S10_SYSMGR_UE_VAL_OFST 0x220
#define S10_SYSMGR_UE_ADDR_OFST 0x124 #define S10_SYSMGR_UE_ADDR_OFST 0x224
#define S10_DDR0_IRQ_MASK BIT(16) #define S10_DDR0_IRQ_MASK BIT(16)
......
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