Commit 2972cc18 authored by Pavel Roskin's avatar Pavel Roskin Committed by John W. Linville

ath5k: remove unused and write-only structures and fields

struct ath5k_avg_val is unused.

In struct ath5k_hw, lladdr, ah_radar and ah_mac_revision are write-only,
rxbufsize is unused, ah_phy is write-only and referenced by unused
macros.

In struct ath5k_vif, lladdr is write-only.

Remove AR5K_TUNE_RADAR_ALERT, which has no effect.
Signed-off-by: default avatarPavel Roskin <proski@gnu.org>
Tested-by: default avatarSedat Dilek <sedat.dilek@gmail.com>
Acked-by: default avatarNick Kossifidis <mickflemm@gmail.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent eb93e891
...@@ -131,13 +131,6 @@ ...@@ -131,13 +131,6 @@
#define AR5K_REG_DISABLE_BITS(ah, _reg, _flags) \ #define AR5K_REG_DISABLE_BITS(ah, _reg, _flags) \
ath5k_hw_reg_write(ah, ath5k_hw_reg_read(ah, _reg) & ~(_flags), _reg) ath5k_hw_reg_write(ah, ath5k_hw_reg_read(ah, _reg) & ~(_flags), _reg)
/* Access to PHY registers */
#define AR5K_PHY_READ(ah, _reg) \
ath5k_hw_reg_read(ah, (ah)->ah_phy + ((_reg) << 2))
#define AR5K_PHY_WRITE(ah, _reg, _val) \
ath5k_hw_reg_write(ah, _val, (ah)->ah_phy + ((_reg) << 2))
/* Access QCU registers per queue */ /* Access QCU registers per queue */
#define AR5K_REG_READ_Q(ah, _reg, _queue) \ #define AR5K_REG_READ_Q(ah, _reg, _queue) \
(ath5k_hw_reg_read(ah, _reg) & (1 << _queue)) \ (ath5k_hw_reg_read(ah, _reg) & (1 << _queue)) \
...@@ -166,7 +159,6 @@ ...@@ -166,7 +159,6 @@
#define AR5K_TUNE_DMA_BEACON_RESP 2 #define AR5K_TUNE_DMA_BEACON_RESP 2
#define AR5K_TUNE_SW_BEACON_RESP 10 #define AR5K_TUNE_SW_BEACON_RESP 10
#define AR5K_TUNE_ADDITIONAL_SWBA_BACKOFF 0 #define AR5K_TUNE_ADDITIONAL_SWBA_BACKOFF 0
#define AR5K_TUNE_RADAR_ALERT false
#define AR5K_TUNE_MIN_TX_FIFO_THRES 1 #define AR5K_TUNE_MIN_TX_FIFO_THRES 1
#define AR5K_TUNE_MAX_TX_FIFO_THRES ((IEEE80211_MAX_FRAME_LEN / 64) + 1) #define AR5K_TUNE_MAX_TX_FIFO_THRES ((IEEE80211_MAX_FRAME_LEN / 64) + 1)
#define AR5K_TUNE_REGISTER_TIMEOUT 20000 #define AR5K_TUNE_REGISTER_TIMEOUT 20000
...@@ -1013,16 +1005,6 @@ struct ath5k_nfcal_hist { ...@@ -1013,16 +1005,6 @@ struct ath5k_nfcal_hist {
s16 nfval[ATH5K_NF_CAL_HIST_MAX]; /* last few noise floors */ s16 nfval[ATH5K_NF_CAL_HIST_MAX]; /* last few noise floors */
}; };
/**
* struct avg_val - Helper structure for average calculation
* @avg: contains the actual average value
* @avg_weight: is used internally during calculation to prevent rounding errors
*/
struct ath5k_avg_val {
int avg;
int avg_weight;
};
#define ATH5K_LED_MAX_NAME_LEN 31 #define ATH5K_LED_MAX_NAME_LEN 31
/* /*
...@@ -1148,7 +1130,6 @@ struct ath5k_hw { ...@@ -1148,7 +1130,6 @@ struct ath5k_hw {
bool rx_pending; /* rx tasklet pending */ bool rx_pending; /* rx tasklet pending */
bool tx_pending; /* tx tasklet pending */ bool tx_pending; /* tx tasklet pending */
u8 lladdr[ETH_ALEN];
u8 bssidmask[ETH_ALEN]; u8 bssidmask[ETH_ALEN];
unsigned int led_pin, /* GPIO pin for driving LED */ unsigned int led_pin, /* GPIO pin for driving LED */
...@@ -1156,7 +1137,6 @@ struct ath5k_hw { ...@@ -1156,7 +1137,6 @@ struct ath5k_hw {
struct work_struct reset_work; /* deferred chip reset */ struct work_struct reset_work; /* deferred chip reset */
unsigned int rxbufsize; /* rx size based on mtu */
struct list_head rxbuf; /* receive buffer */ struct list_head rxbuf; /* receive buffer */
spinlock_t rxbuflock; spinlock_t rxbuflock;
u32 *rxlink; /* link ptr in last RX desc */ u32 *rxlink; /* link ptr in last RX desc */
...@@ -1208,10 +1188,8 @@ struct ath5k_hw { ...@@ -1208,10 +1188,8 @@ struct ath5k_hw {
enum ath5k_version ah_version; enum ath5k_version ah_version;
enum ath5k_radio ah_radio; enum ath5k_radio ah_radio;
u32 ah_phy;
u32 ah_mac_srev; u32 ah_mac_srev;
u16 ah_mac_version; u16 ah_mac_version;
u16 ah_mac_revision;
u16 ah_phy_revision; u16 ah_phy_revision;
u16 ah_radio_5ghz_revision; u16 ah_radio_5ghz_revision;
u16 ah_radio_2ghz_revision; u16 ah_radio_2ghz_revision;
...@@ -1279,12 +1257,6 @@ struct ath5k_hw { ...@@ -1279,12 +1257,6 @@ struct ath5k_hw {
bool txp_setup; bool txp_setup;
} ah_txpower; } ah_txpower;
struct {
bool r_enabled;
int r_last_alert;
struct ieee80211_channel r_last_channel;
} ah_radar;
struct ath5k_nfcal_hist ah_nfcal_hist; struct ath5k_nfcal_hist ah_nfcal_hist;
/* average beacon RSSI in our BSS (used by ANI) */ /* average beacon RSSI in our BSS (used by ANI) */
......
...@@ -114,7 +114,6 @@ int ath5k_hw_init(struct ath5k_hw *ah) ...@@ -114,7 +114,6 @@ int ath5k_hw_init(struct ath5k_hw *ah)
/* /*
* HW information * HW information
*/ */
ah->ah_radar.r_enabled = AR5K_TUNE_RADAR_ALERT;
ah->ah_bwmode = AR5K_BWMODE_DEFAULT; ah->ah_bwmode = AR5K_BWMODE_DEFAULT;
ah->ah_txpower.txp_tpc = AR5K_TUNE_TPC_TXPOWER; ah->ah_txpower.txp_tpc = AR5K_TUNE_TPC_TXPOWER;
ah->ah_imr = 0; ah->ah_imr = 0;
...@@ -137,9 +136,8 @@ int ath5k_hw_init(struct ath5k_hw *ah) ...@@ -137,9 +136,8 @@ int ath5k_hw_init(struct ath5k_hw *ah)
else else
ah->ah_version = AR5K_AR5212; ah->ah_version = AR5K_AR5212;
/* Get the MAC revision */ /* Get the MAC version */
ah->ah_mac_version = AR5K_REG_MS(srev, AR5K_SREV_VER); ah->ah_mac_version = AR5K_REG_MS(srev, AR5K_SREV_VER);
ah->ah_mac_revision = AR5K_REG_MS(srev, AR5K_SREV_REV);
/* Fill the ath5k_hw struct with the needed functions */ /* Fill the ath5k_hw struct with the needed functions */
ret = ath5k_hw_init_desc_functions(ah); ret = ath5k_hw_init_desc_functions(ah);
...@@ -156,7 +154,6 @@ int ath5k_hw_init(struct ath5k_hw *ah) ...@@ -156,7 +154,6 @@ int ath5k_hw_init(struct ath5k_hw *ah)
0xffffffff; 0xffffffff;
ah->ah_radio_5ghz_revision = ath5k_hw_radio_revision(ah, ah->ah_radio_5ghz_revision = ath5k_hw_radio_revision(ah,
CHANNEL_5GHZ); CHANNEL_5GHZ);
ah->ah_phy = AR5K_PHY(0);
/* Try to identify radio chip based on its srev */ /* Try to identify radio chip based on its srev */
switch (ah->ah_radio_5ghz_revision & 0xf0) { switch (ah->ah_radio_5ghz_revision & 0xf0) {
......
...@@ -2862,7 +2862,6 @@ ath5k_init(struct ieee80211_hw *hw) ...@@ -2862,7 +2862,6 @@ ath5k_init(struct ieee80211_hw *hw)
} }
SET_IEEE80211_PERM_ADDR(hw, mac); SET_IEEE80211_PERM_ADDR(hw, mac);
memcpy(&ah->lladdr, mac, ETH_ALEN);
/* All MAC address bits matter for ACKs */ /* All MAC address bits matter for ACKs */
ath5k_update_bssid_mask_and_opmode(ah, NULL); ath5k_update_bssid_mask_and_opmode(ah, NULL);
......
...@@ -64,7 +64,6 @@ struct ath5k_vif { ...@@ -64,7 +64,6 @@ struct ath5k_vif {
enum nl80211_iftype opmode; enum nl80211_iftype opmode;
int bslot; int bslot;
struct ath5k_buf *bbuf; /* beacon buffer */ struct ath5k_buf *bbuf; /* beacon buffer */
u8 lladdr[ETH_ALEN];
}; };
struct ath5k_vif_iter_data { struct ath5k_vif_iter_data {
......
...@@ -137,11 +137,8 @@ ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) ...@@ -137,11 +137,8 @@ ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
/* Any MAC address is fine, all others are included through the /* Any MAC address is fine, all others are included through the
* filter. * filter.
*/ */
memcpy(&ah->lladdr, vif->addr, ETH_ALEN);
ath5k_hw_set_lladdr(ah, vif->addr); ath5k_hw_set_lladdr(ah, vif->addr);
memcpy(&avf->lladdr, vif->addr, ETH_ALEN);
ath5k_update_bssid_mask_and_opmode(ah, vif); ath5k_update_bssid_mask_and_opmode(ah, vif);
ret = 0; ret = 0;
end: end:
......
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