Commit 2e3f0098 authored by Dominik Brodowski's avatar Dominik Brodowski Committed by Ingo Molnar

x86/entry/64: Merge SAVE_C_REGS and SAVE_EXTRA_REGS, remove unused extensions

All current code paths call SAVE_C_REGS and then immediately
SAVE_EXTRA_REGS. Therefore, merge these two macros and order the MOV
sequeneces properly.

While at it, remove the macros to save all except specific registers,
as these macros have been unused for a long time.
Suggested-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: default avatarDominik Brodowski <linux@dominikbrodowski.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: dan.j.williams@intel.com
Link: http://lkml.kernel.org/r/20180211104949.12992-2-linux@dominikbrodowski.netSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 21e433bd
...@@ -101,49 +101,22 @@ For 32-bit we have the following conventions - kernel is built with ...@@ -101,49 +101,22 @@ For 32-bit we have the following conventions - kernel is built with
addq $-(15*8), %rsp addq $-(15*8), %rsp
.endm .endm
.macro SAVE_C_REGS_HELPER offset=0 rax=1 rcx=1 r8910=1 r11=1 .macro SAVE_REGS offset=0
.if \r11
movq %r11, 6*8+\offset(%rsp)
.endif
.if \r8910
movq %r10, 7*8+\offset(%rsp)
movq %r9, 8*8+\offset(%rsp)
movq %r8, 9*8+\offset(%rsp)
.endif
.if \rax
movq %rax, 10*8+\offset(%rsp)
.endif
.if \rcx
movq %rcx, 11*8+\offset(%rsp)
.endif
movq %rdx, 12*8+\offset(%rsp)
movq %rsi, 13*8+\offset(%rsp)
movq %rdi, 14*8+\offset(%rsp) movq %rdi, 14*8+\offset(%rsp)
UNWIND_HINT_REGS offset=\offset extra=0 movq %rsi, 13*8+\offset(%rsp)
.endm movq %rdx, 12*8+\offset(%rsp)
.macro SAVE_C_REGS offset=0 movq %rcx, 11*8+\offset(%rsp)
SAVE_C_REGS_HELPER \offset, 1, 1, 1, 1 movq %rax, 10*8+\offset(%rsp)
.endm movq %r8, 9*8+\offset(%rsp)
.macro SAVE_C_REGS_EXCEPT_RAX_RCX offset=0 movq %r9, 8*8+\offset(%rsp)
SAVE_C_REGS_HELPER \offset, 0, 0, 1, 1 movq %r10, 7*8+\offset(%rsp)
.endm movq %r11, 6*8+\offset(%rsp)
.macro SAVE_C_REGS_EXCEPT_R891011
SAVE_C_REGS_HELPER 0, 1, 1, 0, 0
.endm
.macro SAVE_C_REGS_EXCEPT_RCX_R891011
SAVE_C_REGS_HELPER 0, 1, 0, 0, 0
.endm
.macro SAVE_C_REGS_EXCEPT_RAX_RCX_R11
SAVE_C_REGS_HELPER 0, 0, 0, 1, 0
.endm
.macro SAVE_EXTRA_REGS offset=0
movq %r15, 0*8+\offset(%rsp)
movq %r14, 1*8+\offset(%rsp)
movq %r13, 2*8+\offset(%rsp)
movq %r12, 3*8+\offset(%rsp)
movq %rbp, 4*8+\offset(%rsp)
movq %rbx, 5*8+\offset(%rsp) movq %rbx, 5*8+\offset(%rsp)
movq %rbp, 4*8+\offset(%rsp)
movq %r12, 3*8+\offset(%rsp)
movq %r13, 2*8+\offset(%rsp)
movq %r14, 1*8+\offset(%rsp)
movq %r15, 0*8+\offset(%rsp)
UNWIND_HINT_REGS offset=\offset UNWIND_HINT_REGS offset=\offset
.endm .endm
...@@ -197,7 +170,7 @@ For 32-bit we have the following conventions - kernel is built with ...@@ -197,7 +170,7 @@ For 32-bit we have the following conventions - kernel is built with
* is just setting the LSB, which makes it an invalid stack address and is also * is just setting the LSB, which makes it an invalid stack address and is also
* a signal to the unwinder that it's a pt_regs pointer in disguise. * a signal to the unwinder that it's a pt_regs pointer in disguise.
* *
* NOTE: This macro must be used *after* SAVE_EXTRA_REGS because it corrupts * NOTE: This macro must be used *after* SAVE_REGS because it corrupts
* the original rbp. * the original rbp.
*/ */
.macro ENCODE_FRAME_POINTER ptregs_offset=0 .macro ENCODE_FRAME_POINTER ptregs_offset=0
......
...@@ -573,8 +573,7 @@ END(irq_entries_start) ...@@ -573,8 +573,7 @@ END(irq_entries_start)
1: 1:
ALLOC_PT_GPREGS_ON_STACK ALLOC_PT_GPREGS_ON_STACK
SAVE_C_REGS SAVE_REGS
SAVE_EXTRA_REGS
CLEAR_REGS_NOSPEC CLEAR_REGS_NOSPEC
ENCODE_FRAME_POINTER ENCODE_FRAME_POINTER
...@@ -1132,8 +1131,7 @@ ENTRY(xen_failsafe_callback) ...@@ -1132,8 +1131,7 @@ ENTRY(xen_failsafe_callback)
UNWIND_HINT_IRET_REGS UNWIND_HINT_IRET_REGS
pushq $-1 /* orig_ax = -1 => not a system call */ pushq $-1 /* orig_ax = -1 => not a system call */
ALLOC_PT_GPREGS_ON_STACK ALLOC_PT_GPREGS_ON_STACK
SAVE_C_REGS SAVE_REGS
SAVE_EXTRA_REGS
CLEAR_REGS_NOSPEC CLEAR_REGS_NOSPEC
ENCODE_FRAME_POINTER ENCODE_FRAME_POINTER
jmp error_exit jmp error_exit
...@@ -1178,8 +1176,7 @@ idtentry machine_check do_mce has_error_code=0 paranoid=1 ...@@ -1178,8 +1176,7 @@ idtentry machine_check do_mce has_error_code=0 paranoid=1
ENTRY(paranoid_entry) ENTRY(paranoid_entry)
UNWIND_HINT_FUNC UNWIND_HINT_FUNC
cld cld
SAVE_C_REGS 8 SAVE_REGS 8
SAVE_EXTRA_REGS 8
CLEAR_REGS_NOSPEC CLEAR_REGS_NOSPEC
ENCODE_FRAME_POINTER 8 ENCODE_FRAME_POINTER 8
movl $1, %ebx movl $1, %ebx
...@@ -1231,8 +1228,7 @@ END(paranoid_exit) ...@@ -1231,8 +1228,7 @@ END(paranoid_exit)
ENTRY(error_entry) ENTRY(error_entry)
UNWIND_HINT_FUNC UNWIND_HINT_FUNC
cld cld
SAVE_C_REGS 8 SAVE_REGS 8
SAVE_EXTRA_REGS 8
CLEAR_REGS_NOSPEC CLEAR_REGS_NOSPEC
ENCODE_FRAME_POINTER 8 ENCODE_FRAME_POINTER 8
testb $3, CS+8(%rsp) testb $3, CS+8(%rsp)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment