Commit 2e554390 authored by Alexander Monakov's avatar Alexander Monakov Committed by Jisheng Zhang

ARM: berlin: extend BG2CD Kconfig entry

BG2CD SoC uses r3p0 Cortex-A9 MPCore single-CPU cluster. Autoselect
pertinent errata, the SCU and the global timer, and allow use of the
local timer on uniprocessor kernels.

PL310 L2 cache controller has revision r3p2; no errata to select.
Signed-off-by: default avatarAlexander Monakov <amonakov@ispras.ru>
Signed-off-by: default avatarJisheng Zhang <Jisheng.Zhang@synaptics.com>
parent 60cc43fc
......@@ -23,8 +23,12 @@ config MACH_BERLIN_BG2
config MACH_BERLIN_BG2CD
bool "Marvell Armada 1500-mini (BG2CD)"
select ARM_ERRATA_754322
select ARM_ERRATA_775420
select ARM_GLOBAL_TIMER
select CACHE_L2X0
select HAVE_ARM_TWD if SMP
select HAVE_ARM_SCU
select HAVE_ARM_TWD
select PINCTRL_BERLIN_BG2CD
config MACH_BERLIN_BG2Q
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment